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R600: Some factorization

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182123 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vincent Lejeune
2013-05-17 16:50:02 +00:00
parent dcfcf1d1ff
commit 25c209e9a2
5 changed files with 221 additions and 203 deletions
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16
lib/Target/R600/R600ControlFlowFinalizer.cpp
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@ -172,22 +172,20 @@ private:
AMDGPU::ALU_LITERAL_Z,
AMDGPU::ALU_LITERAL_W
};
for (unsigned i = 0, e = MI->getNumOperands(); i < e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg())
const SmallVector<std::pair<MachineOperand *, int64_t>, 3 > Srcs =
TII->getSrcs(MI);
for (unsigned i = 0, e = Srcs.size(); i < e; ++i) {
if (Srcs[i].first->getReg() != AMDGPU::ALU_LITERAL_X)
continue;
if (MO.getReg() != AMDGPU::ALU_LITERAL_X)
continue;
unsigned ImmIdx = TII->getOperandIdx(MI->getOpcode(), R600Operands::IMM);
int64_t Imm = MI->getOperand(ImmIdx).getImm();
int64_t Imm = Srcs[i].second;
std::vector<int64_t>::iterator It =
std::find(Lits.begin(), Lits.end(), Imm);
if (It != Lits.end()) {
unsigned Index = It - Lits.begin();
MO.setReg(LiteralRegs[Index]);
Srcs[i].first->setReg(LiteralRegs[Index]);
} else {
assert(Lits.size() < 4 && "Too many literals in Instruction Group");
MO.setReg(LiteralRegs[Lits.size()]);
Srcs[i].first->setReg(LiteralRegs[Lits.size()]);
Lits.push_back(Imm);
}
}