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tlbre / tlbwe / tlbsx / tlbsx. variants for the PPC 4xx CPUs.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214784 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joerg Sonnenberger 2014-08-04 21:28:22 +00:00
parent 5b08f1626b
commit 25c8b4774b
4 changed files with 87 additions and 0 deletions
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16
lib/Target/PowerPC/PPCInstrFormats.td
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@ -422,6 +422,22 @@ class XForm_rs<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
let B = 0; let B = 0;
} }
class XForm_tlbws<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin, list<dag> pattern>
: I<opcode, OOL, IOL, asmstr, itin> {
bits<5> RST;
bits<5> A;
bits<1> WS;
let Pattern = pattern;
let Inst{6-10} = RST;
let Inst{11-15} = A;
let Inst{20} = WS;
let Inst{21-30} = xo;
let Inst{31} = 0;
}
class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
InstrItinClass itin, list<dag> pattern> InstrItinClass itin, list<dag> pattern>
: XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {

23
lib/Target/PowerPC/PPCInstrInfo.td
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@ -3121,6 +3121,20 @@ def TLBRE : XForm_24_eieio<31, 946, (outs), (ins),
def TLBWE : XForm_24_eieio<31, 978, (outs), (ins), def TLBWE : XForm_24_eieio<31, 978, (outs), (ins),
"tlbwe", IIC_LdStLoad, []>, Requires<[IsBookE]>; "tlbwe", IIC_LdStLoad, []>, Requires<[IsBookE]>;
def TLBRE2 : XForm_tlbws<31, 946, (outs gprc:$RS), (ins gprc:$A, i1imm:$WS),
"tlbre $RS, $A, $WS", IIC_LdStLoad, []>, Requires<[IsPPC4xx]>;
def TLBWE2 : XForm_tlbws<31, 978, (outs), (ins gprc:$RS, gprc:$A, i1imm:$WS),
"tlbwe $RS, $A, $WS", IIC_LdStLoad, []>, Requires<[IsPPC4xx]>;
def TLBSX2 : XForm_base_r3xo<31, 914, (outs), (ins gprc:$RST, gprc:$A, gprc:$B),
"tlbsx $RST, $A, $B", IIC_LdStLoad, []>,
Requires<[IsPPC4xx]>;
def TLBSX2D : XForm_base_r3xo<31, 914, (outs),
(ins gprc:$RST, gprc:$A, gprc:$B),
"tlbsx. $RST, $A, $B", IIC_LdStLoad, []>,
Requires<[IsPPC4xx]>, isDOT;
def RFI : XForm_0<19, 50, (outs), (ins), "rfi", IIC_BrB, []>, def RFI : XForm_0<19, 50, (outs), (ins), "rfi", IIC_BrB, []>,
Requires<[IsBookE]>; Requires<[IsBookE]>;
def RFCI : XForm_0<19, 51, (outs), (ins), "rfci", IIC_BrB, []>, def RFCI : XForm_0<19, 51, (outs), (ins), "rfci", IIC_BrB, []>,
@ -3301,6 +3315,15 @@ def : InstAlias<"mtsrr1 $RT", (MTSPR 27, gprc:$RT)>;
def : InstAlias<"tlbie $RB", (TLBIE R0, gprc:$RB)>; def : InstAlias<"tlbie $RB", (TLBIE R0, gprc:$RB)>;
def : InstAlias<"tlbrehi $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 0)>,
Requires<[IsPPC4xx]>;
def : InstAlias<"tlbrelo $RS, $A", (TLBRE2 gprc:$RS, gprc:$A, 1)>,
Requires<[IsPPC4xx]>;
def : InstAlias<"tlbwehi $RS, $A", (TLBWE2 gprc:$RS, gprc:$A, 0)>,
Requires<[IsPPC4xx]>;
def : InstAlias<"tlbwelo $RS, $A", (TLBWE2 gprc:$RS, gprc:$A, 1)>,
Requires<[IsPPC4xx]>;
def EXTLWI : PPCAsmPseudo<"extlwi $rA, $rS, $n, $b", def EXTLWI : PPCAsmPseudo<"extlwi $rA, $rS, $n, $b",
(ins gprc:$rA, gprc:$rS, u5imm:$n, u5imm:$b)>; (ins gprc:$rA, gprc:$rS, u5imm:$n, u5imm:$b)>;
def EXTLWIo : PPCAsmPseudo<"extlwi. $rA, $rS, $n, $b", def EXTLWIo : PPCAsmPseudo<"extlwi. $rA, $rS, $n, $b",

15
test/MC/Disassembler/PowerPC/ppc64-encoding-4xx.txt
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@ -4,3 +4,18 @@
0x7c 0x72 0x2a 0x86 0x7c 0x72 0x2a 0x86
# CHECK: mtdcr 178, 3 # CHECK: mtdcr 178, 3
0x7c 0x72 0x2b 0x86 0x7c 0x72 0x2b 0x86
# CHECK: tlbre 2, 3, 0
0x7c 0x43 0x07 0x64
# CHECK: tlbre 2, 3, 1
0x7c 0x43 0x0f 0x64
# CHECK: tlbwe 2, 3, 0
0x7c 0x43 0x07 0xa4
# CHECK: tlbwe 2, 3, 1
0x7c 0x43 0x0f 0xa4
# CHECK: tlbsx 2, 3, 1
0x7c 0x43 0x0f 0x24
# CHECK: tlbsx. 2, 3, 1
0x7c 0x43 0x0f 0x25

33
test/MC/PowerPC/ppc64-encoding-4xx.s
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@ -9,3 +9,36 @@
# CHECK-BE: mtdcr 178, 3 # encoding: [0x7c,0x72,0x2b,0x86] # CHECK-BE: mtdcr 178, 3 # encoding: [0x7c,0x72,0x2b,0x86]
# CHECK-LE: mtdcr 178, 3 # encoding: [0x86,0x2b,0x72,0x7c] # CHECK-LE: mtdcr 178, 3 # encoding: [0x86,0x2b,0x72,0x7c]
mtdcr 178,3 mtdcr 178,3
# CHECK-BE: tlbre 2, 3, 0 # encoding: [0x7c,0x43,0x07,0x64]
# CHECK-LE: tlbre 2, 3, 0 # encoding: [0x64,0x07,0x43,0x7c]
tlbre %r2, %r3, 0
# CHECK-BE: tlbre 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x64]
# CHECK-LE: tlbre 2, 3, 1 # encoding: [0x64,0x0f,0x43,0x7c]
tlbre %r2, %r3, 1
# CHECK-BE: tlbre 2, 3, 0 # encoding: [0x7c,0x43,0x07,0x64]
# CHECK-LE: tlbre 2, 3, 0 # encoding: [0x64,0x07,0x43,0x7c]
tlbrehi %r2, %r3
# CHECK-BE: tlbre 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x64]
# CHECK-LE: tlbre 2, 3, 1 # encoding: [0x64,0x0f,0x43,0x7c]
tlbrelo %r2, %r3
# CHECK-BE: tlbwe 2, 3, 0 # encoding: [0x7c,0x43,0x07,0xa4]
# CHECK-LE: tlbwe 2, 3, 0 # encoding: [0xa4,0x07,0x43,0x7c]
tlbwe %r2, %r3, 0
# CHECK-BE: tlbwe 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0xa4]
# CHECK-LE: tlbwe 2, 3, 1 # encoding: [0xa4,0x0f,0x43,0x7c]
tlbwe %r2, %r3, 1
# CHECK-BE: tlbwe 2, 3, 0 # encoding: [0x7c,0x43,0x07,0xa4]
# CHECK-LE: tlbwe 2, 3, 0 # encoding: [0xa4,0x07,0x43,0x7c]
tlbwehi %r2, %r3
# CHECK-BE: tlbwe 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0xa4]
# CHECK-LE: tlbwe 2, 3, 1 # encoding: [0xa4,0x0f,0x43,0x7c]
tlbwelo %r2, %r3
# CHECK-BE: tlbsx 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x24]
# CHECK-LE: tlbsx 2, 3, 1 # encoding: [0x24,0x0f,0x43,0x7c]
tlbsx %r2, %r3, %r1
# CHECK-BE: tlbsx. 2, 3, 1 # encoding: [0x7c,0x43,0x0f,0x25]
# CHECK-LE: tlbsx. 2, 3, 1 # encoding: [0x25,0x0f,0x43,0x7c]
tlbsx. %r2, %r3, %r1