From 26207e5bf1123a793bd9b38bcda2f569a6b45ef2 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Mon, 28 Sep 2009 20:32:26 +0000 Subject: [PATCH] Introduce the TargetInstrInfo::KILL machine instruction and get rid of the unused DECLARE instruction. KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF in the places where IMPLICIT_DEF is just used to alter liveness of physical registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83006 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/Target.td | 4 ++-- include/llvm/Target/TargetInstrInfo.h | 5 ++++- lib/Target/ARM/ARMBaseInstrInfo.cpp | 1 + lib/Target/ARM/ARMCodeEmitter.cpp | 1 + lib/Target/Alpha/AlphaCodeEmitter.cpp | 1 + lib/Target/PowerPC/PPCCodeEmitter.cpp | 1 + lib/Target/X86/AsmPrinter/X86MCInstLower.cpp | 2 ++ lib/Target/X86/X86CodeEmitter.cpp | 1 + lib/Target/X86/X86InstrInfo.cpp | 1 + utils/TableGen/AsmWriterEmitter.cpp | 2 ++ utils/TableGen/CodeEmitterGen.cpp | 6 +++--- utils/TableGen/CodeGenTarget.cpp | 10 +++++----- utils/TableGen/InstrInfoEmitter.cpp | 2 +- 13 files changed, 25 insertions(+), 12 deletions(-) diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td index 5a8707b5d12..80ee60ada59 100644 --- a/include/llvm/Target/Target.td +++ b/include/llvm/Target/Target.td @@ -426,12 +426,12 @@ def GC_LABEL : Instruction { let Namespace = "TargetInstrInfo"; let hasCtrlDep = 1; } -def DECLARE : Instruction { +def KILL : Instruction { let OutOperandList = (ops); let InOperandList = (ops variable_ops); let AsmString = ""; let Namespace = "TargetInstrInfo"; - let hasCtrlDep = 1; + let neverHasSideEffects = 1; } def EXTRACT_SUBREG : Instruction { let OutOperandList = (ops unknown:$dst); diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 12d6e3b1efe..2d21a9bac68 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -51,7 +51,10 @@ public: DBG_LABEL = 2, EH_LABEL = 3, GC_LABEL = 4, - // FIXME: DECLARE is removed. Readjust enum values ? + + /// KILL - This instruction is a noop that is used only to adjust the liveness + /// of registers. This can be useful when dealing with sub-registers. + KILL = 5, /// EXTRACT_SUBREG - This instruction takes two operands: a register /// that has subregisters, and a subregister index. It returns the diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index a228945f657..79950fe21c0 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -423,6 +423,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { default: llvm_unreachable("Unknown or unset size field for instr!"); case TargetInstrInfo::IMPLICIT_DEF: + case TargetInstrInfo::KILL: case TargetInstrInfo::DBG_LABEL: case TargetInstrInfo::EH_LABEL: return 0; diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index 5e0c11e5da8..5345f8106d0 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -611,6 +611,7 @@ void Emitter::emitPseudoInstruction(const MachineInstr &MI) { MCE.emitLabel(MI.getOperand(0).getImm()); break; case TargetInstrInfo::IMPLICIT_DEF: + case TargetInstrInfo::KILL: case ARM::DWARF_LOC: // Do nothing. break; diff --git a/lib/Target/Alpha/AlphaCodeEmitter.cpp b/lib/Target/Alpha/AlphaCodeEmitter.cpp index f7089ad79c3..ac90e4627e2 100644 --- a/lib/Target/Alpha/AlphaCodeEmitter.cpp +++ b/lib/Target/Alpha/AlphaCodeEmitter.cpp @@ -125,6 +125,7 @@ void Emitter::emitBasicBlock(MachineBasicBlock &MBB) { case Alpha::PCLABEL: case Alpha::MEMLABEL: case TargetInstrInfo::IMPLICIT_DEF: + case TargetInstrInfo::KILL: break; //skip these } } diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp index 3d62f2b8694..16d55a3ccdb 100644 --- a/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -142,6 +142,7 @@ void Emitter::emitBasicBlock(MachineBasicBlock &MBB) { MCE.emitLabel(MI.getOperand(0).getImm()); break; case TargetInstrInfo::IMPLICIT_DEF: + case TargetInstrInfo::KILL: break; // pseudo opcode, no side effects case PPC::MovePCtoLR: case PPC::MovePCtoLR8: diff --git a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp index 28cdbaca403..5ccddf57e7a 100644 --- a/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp +++ b/lib/Target/X86/AsmPrinter/X86MCInstLower.cpp @@ -407,6 +407,8 @@ void X86AsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) { case TargetInstrInfo::IMPLICIT_DEF: printImplicitDef(MI); return; + case TargetInstrInfo::KILL: + return; case X86::MOVPC32r: { MCInst TmpInst; // This is a pseudo op for a two instruction sequence with a label, which diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp index 5ce6f3c4a19..4c12edd2a01 100644 --- a/lib/Target/X86/X86CodeEmitter.cpp +++ b/lib/Target/X86/X86CodeEmitter.cpp @@ -596,6 +596,7 @@ void Emitter::emitInstruction(const MachineInstr &MI, MCE.emitLabel(MI.getOperand(0).getImm()); break; case TargetInstrInfo::IMPLICIT_DEF: + case TargetInstrInfo::KILL: case X86::DWARF_LOC: case X86::FP_REG_KILL: break; diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index 12c4b9c2131..363674b3877 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -3061,6 +3061,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI, case TargetInstrInfo::EH_LABEL: break; case TargetInstrInfo::IMPLICIT_DEF: + case TargetInstrInfo::KILL: case X86::DWARF_LOC: case X86::FP_REG_KILL: break; diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp index 29bcb399ad6..84a647bea30 100644 --- a/utils/TableGen/AsmWriterEmitter.cpp +++ b/utils/TableGen/AsmWriterEmitter.cpp @@ -681,6 +681,8 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) { << " } else if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {\n" << " printImplicitDef(MI);\n" << " return;\n" + << " } else if (MI->getOpcode() == TargetInstrInfo::KILL) {\n" + << " return;\n" << " }\n\n"; O << "\n#endif\n"; diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp index 6ab9c9b9509..7e6c769ac4f 100644 --- a/utils/TableGen/CodeEmitterGen.cpp +++ b/utils/TableGen/CodeEmitterGen.cpp @@ -29,7 +29,7 @@ void CodeEmitterGen::reverseBits(std::vector &Insts) { R->getName() == "DBG_LABEL" || R->getName() == "EH_LABEL" || R->getName() == "GC_LABEL" || - R->getName() == "DECLARE" || + R->getName() == "KILL" || R->getName() == "EXTRACT_SUBREG" || R->getName() == "INSERT_SUBREG" || R->getName() == "IMPLICIT_DEF" || @@ -106,7 +106,7 @@ void CodeEmitterGen::run(raw_ostream &o) { R->getName() == "DBG_LABEL" || R->getName() == "EH_LABEL" || R->getName() == "GC_LABEL" || - R->getName() == "DECLARE" || + R->getName() == "KILL" || R->getName() == "EXTRACT_SUBREG" || R->getName() == "INSERT_SUBREG" || R->getName() == "IMPLICIT_DEF" || @@ -144,7 +144,7 @@ void CodeEmitterGen::run(raw_ostream &o) { InstName == "DBG_LABEL"|| InstName == "EH_LABEL"|| InstName == "GC_LABEL"|| - InstName == "DECLARE"|| + InstName == "KILL"|| InstName == "EXTRACT_SUBREG" || InstName == "INSERT_SUBREG" || InstName == "IMPLICIT_DEF" || diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index a3ec8dc41d0..0edca7353a4 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -308,9 +308,9 @@ getInstructionsByEnumValue(std::vector if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!"; const CodeGenInstruction *GC_LABEL = &I->second; - I = getInstructions().find("DECLARE"); - if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!"; - const CodeGenInstruction *DECLARE = &I->second; + I = getInstructions().find("KILL"); + if (I == Instructions.end()) throw "Could not find 'KILL' instruction!"; + const CodeGenInstruction *KILL = &I->second; I = getInstructions().find("EXTRACT_SUBREG"); if (I == Instructions.end()) @@ -343,7 +343,7 @@ getInstructionsByEnumValue(std::vector NumberedInstructions.push_back(DBG_LABEL); NumberedInstructions.push_back(EH_LABEL); NumberedInstructions.push_back(GC_LABEL); - NumberedInstructions.push_back(DECLARE); + NumberedInstructions.push_back(KILL); NumberedInstructions.push_back(EXTRACT_SUBREG); NumberedInstructions.push_back(INSERT_SUBREG); NumberedInstructions.push_back(IMPLICIT_DEF); @@ -355,7 +355,7 @@ getInstructionsByEnumValue(std::vector &II->second != DBG_LABEL && &II->second != EH_LABEL && &II->second != GC_LABEL && - &II->second != DECLARE && + &II->second != KILL && &II->second != EXTRACT_SUBREG && &II->second != INSERT_SUBREG && &II->second != IMPLICIT_DEF && diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index 533ff9f98f3..c28180b184f 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -339,7 +339,7 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val, R->getName() != "DBG_LABEL" && R->getName() != "EH_LABEL" && R->getName() != "GC_LABEL" && - R->getName() != "DECLARE" && + R->getName() != "KILL" && R->getName() != "EXTRACT_SUBREG" && R->getName() != "INSERT_SUBREG" && R->getName() != "IMPLICIT_DEF" &&