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Introduce the TargetInstrInfo::KILL machine instruction and get rid of the

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unused DECLARE instruction.

KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF
in the places where IMPLICIT_DEF is just used to alter liveness of physical
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83006 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2009-09-28 20:32:26 +00:00
parent c60e0bec11
commit 26207e5bf1
13 changed files with 25 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
include/llvm/Target/Target.td
View File

@ -426,12 +426,12 @@ def GC_LABEL : Instruction {
let Namespace = "TargetInstrInfo";
let hasCtrlDep = 1;
}
def DECLARE : Instruction {
def KILL : Instruction {
let OutOperandList = (ops);
let InOperandList = (ops variable_ops);
let AsmString = "";
let Namespace = "TargetInstrInfo";
let hasCtrlDep = 1;
let neverHasSideEffects = 1;
}
def EXTRACT_SUBREG : Instruction {
let OutOperandList = (ops unknown:$dst);

5
include/llvm/Target/TargetInstrInfo.h
View File

@ -51,7 +51,10 @@ public:
DBG_LABEL = 2,
EH_LABEL = 3,
GC_LABEL = 4,
// FIXME: DECLARE is removed. Readjust enum values ?
/// KILL - This instruction is a noop that is used only to adjust the liveness
/// of registers. This can be useful when dealing with sub-registers.
KILL = 5,
/// EXTRACT_SUBREG - This instruction takes two operands: a register
/// that has subregisters, and a subregister index. It returns the

1
lib/Target/ARM/ARMBaseInstrInfo.cpp
View File

@ -423,6 +423,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
default:
llvm_unreachable("Unknown or unset size field for instr!");
case TargetInstrInfo::IMPLICIT_DEF:
case TargetInstrInfo::KILL:
case TargetInstrInfo::DBG_LABEL:
case TargetInstrInfo::EH_LABEL:
return 0;

1
lib/Target/ARM/ARMCodeEmitter.cpp
View File

@ -611,6 +611,7 @@ void Emitter<CodeEmitter>::emitPseudoInstruction(const MachineInstr &MI) {
MCE.emitLabel(MI.getOperand(0).getImm());
break;
case TargetInstrInfo::IMPLICIT_DEF:
case TargetInstrInfo::KILL:
case ARM::DWARF_LOC:
// Do nothing.
break;

1
lib/Target/Alpha/AlphaCodeEmitter.cpp
View File

@ -125,6 +125,7 @@ void Emitter<CodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
case Alpha::PCLABEL:
case Alpha::MEMLABEL:
case TargetInstrInfo::IMPLICIT_DEF:
case TargetInstrInfo::KILL:
break; //skip these
}
}

1
lib/Target/PowerPC/PPCCodeEmitter.cpp
View File

@ -142,6 +142,7 @@ void Emitter<CodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
MCE.emitLabel(MI.getOperand(0).getImm());
break;
case TargetInstrInfo::IMPLICIT_DEF:
case TargetInstrInfo::KILL:
break; // pseudo opcode, no side effects
case PPC::MovePCtoLR:
case PPC::MovePCtoLR8:

2
lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
View File

@ -407,6 +407,8 @@ void X86AsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) {
case TargetInstrInfo::IMPLICIT_DEF:
printImplicitDef(MI);
return;
case TargetInstrInfo::KILL:
return;
case X86::MOVPC32r: {
MCInst TmpInst;
// This is a pseudo op for a two instruction sequence with a label, which

1
lib/Target/X86/X86CodeEmitter.cpp
View File

@ -596,6 +596,7 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI,
MCE.emitLabel(MI.getOperand(0).getImm());
break;
case TargetInstrInfo::IMPLICIT_DEF:
case TargetInstrInfo::KILL:
case X86::DWARF_LOC:
case X86::FP_REG_KILL:
break;

1
lib/Target/X86/X86InstrInfo.cpp
View File

@ -3061,6 +3061,7 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI,
case TargetInstrInfo::EH_LABEL:
break;
case TargetInstrInfo::IMPLICIT_DEF:
case TargetInstrInfo::KILL:
case X86::DWARF_LOC:
case X86::FP_REG_KILL:
break;

2
utils/TableGen/AsmWriterEmitter.cpp
View File

@ -681,6 +681,8 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
<< " } else if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {\n"
<< " printImplicitDef(MI);\n"
<< " return;\n"
<< " } else if (MI->getOpcode() == TargetInstrInfo::KILL) {\n"
<< " return;\n"
<< " }\n\n";
O << "\n#endif\n";

6
utils/TableGen/CodeEmitterGen.cpp
View File

@ -29,7 +29,7 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
R->getName() == "DBG_LABEL" ||
R->getName() == "EH_LABEL" ||
R->getName() == "GC_LABEL" ||
R->getName() == "DECLARE" ||
R->getName() == "KILL" ||
R->getName() == "EXTRACT_SUBREG" ||
R->getName() == "INSERT_SUBREG" ||
R->getName() == "IMPLICIT_DEF" ||
@ -106,7 +106,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
R->getName() == "DBG_LABEL" ||
R->getName() == "EH_LABEL" ||
R->getName() == "GC_LABEL" ||
R->getName() == "DECLARE" ||
R->getName() == "KILL" ||
R->getName() == "EXTRACT_SUBREG" ||
R->getName() == "INSERT_SUBREG" ||
R->getName() == "IMPLICIT_DEF" ||
@ -144,7 +144,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
InstName == "DBG_LABEL"||
InstName == "EH_LABEL"||
InstName == "GC_LABEL"||
InstName == "DECLARE"||
InstName == "KILL"||
InstName == "EXTRACT_SUBREG" ||
InstName == "INSERT_SUBREG" ||
InstName == "IMPLICIT_DEF" ||

10
utils/TableGen/CodeGenTarget.cpp
View File

@ -308,9 +308,9 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
if (I == Instructions.end()) throw "Could not find 'GC_LABEL' instruction!";
const CodeGenInstruction *GC_LABEL = &I->second;
I = getInstructions().find("DECLARE");
if (I == Instructions.end()) throw "Could not find 'DECLARE' instruction!";
const CodeGenInstruction *DECLARE = &I->second;
I = getInstructions().find("KILL");
if (I == Instructions.end()) throw "Could not find 'KILL' instruction!";
const CodeGenInstruction *KILL = &I->second;
I = getInstructions().find("EXTRACT_SUBREG");
if (I == Instructions.end())
@ -343,7 +343,7 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
NumberedInstructions.push_back(DBG_LABEL);
NumberedInstructions.push_back(EH_LABEL);
NumberedInstructions.push_back(GC_LABEL);
NumberedInstructions.push_back(DECLARE);
NumberedInstructions.push_back(KILL);
NumberedInstructions.push_back(EXTRACT_SUBREG);
NumberedInstructions.push_back(INSERT_SUBREG);
NumberedInstructions.push_back(IMPLICIT_DEF);
@ -355,7 +355,7 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
&II->second != DBG_LABEL &&
&II->second != EH_LABEL &&
&II->second != GC_LABEL &&
&II->second != DECLARE &&
&II->second != KILL &&
&II->second != EXTRACT_SUBREG &&
&II->second != INSERT_SUBREG &&
&II->second != IMPLICIT_DEF &&

2
utils/TableGen/InstrInfoEmitter.cpp
View File

@ -339,7 +339,7 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
R->getName() != "DBG_LABEL" &&
R->getName() != "EH_LABEL" &&
R->getName() != "GC_LABEL" &&
R->getName() != "DECLARE" &&
R->getName() != "KILL" &&
R->getName() != "EXTRACT_SUBREG" &&
R->getName() != "INSERT_SUBREG" &&
R->getName() != "IMPLICIT_DEF" &&