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Factor out the code for finding an available register for use
in breaking an anti-dependence into a separate function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78767 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -158,6 +158,9 @@ namespace {
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void ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle);
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void ListScheduleTopDown();
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bool BreakAntiDependencies();
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unsigned findSuitableFreeRegister(unsigned AntiDepReg,
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unsigned LastNewReg,
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const TargetRegisterClass *);
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};
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}
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@ -510,6 +513,36 @@ void SchedulePostRATDList::ScanInstruction(MachineInstr *MI,
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}
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}
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unsigned
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SchedulePostRATDList::findSuitableFreeRegister(unsigned AntiDepReg,
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unsigned LastNewReg,
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const TargetRegisterClass *RC) {
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for (TargetRegisterClass::iterator R = RC->allocation_order_begin(MF),
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RE = RC->allocation_order_end(MF); R != RE; ++R) {
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unsigned NewReg = *R;
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// Don't replace a register with itself.
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if (NewReg == AntiDepReg) continue;
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// Don't replace a register with one that was recently used to repair
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// an anti-dependence with this AntiDepReg, because that would
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// re-introduce that anti-dependence.
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if (NewReg == LastNewReg) continue;
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// If NewReg is dead and NewReg's most recent def is not before
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// AntiDepReg's kill, it's safe to replace AntiDepReg with NewReg.
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assert(((KillIndices[AntiDepReg] == ~0u) != (DefIndices[AntiDepReg] == ~0u)) &&
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"Kill and Def maps aren't consistent for AntiDepReg!");
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assert(((KillIndices[NewReg] == ~0u) != (DefIndices[NewReg] == ~0u)) &&
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"Kill and Def maps aren't consistent for NewReg!");
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if (KillIndices[NewReg] == ~0u &&
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Classes[NewReg] != reinterpret_cast<TargetRegisterClass *>(-1) &&
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KillIndices[AntiDepReg] <= DefIndices[NewReg])
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continue;
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return NewReg;
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}
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// No registers are free and available!
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return 0;
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}
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/// BreakAntiDependencies - Identifiy anti-dependencies along the critical path
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/// of the ScheduleDAG and break them by renaming registers.
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///
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@ -674,60 +707,43 @@ bool SchedulePostRATDList::BreakAntiDependencies() {
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// TODO: Instead of picking the first free register, consider which might
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// be the best.
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if (AntiDepReg != 0) {
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for (TargetRegisterClass::iterator R = RC->allocation_order_begin(MF),
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RE = RC->allocation_order_end(MF); R != RE; ++R) {
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unsigned NewReg = *R;
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// Don't replace a register with itself.
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if (NewReg == AntiDepReg) continue;
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// Don't replace a register with one that was recently used to repair
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// an anti-dependence with this AntiDepReg, because that would
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// re-introduce that anti-dependence.
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if (NewReg == LastNewReg[AntiDepReg]) continue;
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// If NewReg is dead and NewReg's most recent def is not before
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// AntiDepReg's kill, it's safe to replace AntiDepReg with NewReg.
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assert(((KillIndices[AntiDepReg] == ~0u) != (DefIndices[AntiDepReg] == ~0u)) &&
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"Kill and Def maps aren't consistent for AntiDepReg!");
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assert(((KillIndices[NewReg] == ~0u) != (DefIndices[NewReg] == ~0u)) &&
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"Kill and Def maps aren't consistent for NewReg!");
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if (KillIndices[NewReg] == ~0u &&
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Classes[NewReg] != reinterpret_cast<TargetRegisterClass *>(-1) &&
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KillIndices[AntiDepReg] <= DefIndices[NewReg]) {
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DEBUG(errs() << "Breaking anti-dependence edge on "
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<< TRI->getName(AntiDepReg)
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<< " with " << RegRefs.count(AntiDepReg) << " references"
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<< " using " << TRI->getName(NewReg) << "!\n");
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if (unsigned NewReg = findSuitableFreeRegister(AntiDepReg,
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LastNewReg[AntiDepReg],
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RC)) {
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DEBUG(errs() << "Breaking anti-dependence edge on "
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<< TRI->getName(AntiDepReg)
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<< " with " << RegRefs.count(AntiDepReg) << " references"
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<< " using " << TRI->getName(NewReg) << "!\n");
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// Update the references to the old register to refer to the new
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// register.
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std::pair<std::multimap<unsigned, MachineOperand *>::iterator,
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std::multimap<unsigned, MachineOperand *>::iterator>
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Range = RegRefs.equal_range(AntiDepReg);
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for (std::multimap<unsigned, MachineOperand *>::iterator
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Q = Range.first, QE = Range.second; Q != QE; ++Q)
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Q->second->setReg(NewReg);
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// Update the references to the old register to refer to the new
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// register.
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std::pair<std::multimap<unsigned, MachineOperand *>::iterator,
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std::multimap<unsigned, MachineOperand *>::iterator>
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Range = RegRefs.equal_range(AntiDepReg);
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for (std::multimap<unsigned, MachineOperand *>::iterator
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Q = Range.first, QE = Range.second; Q != QE; ++Q)
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Q->second->setReg(NewReg);
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// We just went back in time and modified history; the
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// liveness information for the anti-depenence reg is now
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// inconsistent. Set the state as if it were dead.
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Classes[NewReg] = Classes[AntiDepReg];
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DefIndices[NewReg] = DefIndices[AntiDepReg];
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KillIndices[NewReg] = KillIndices[AntiDepReg];
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assert(((KillIndices[NewReg] == ~0u) !=
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(DefIndices[NewReg] == ~0u)) &&
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"Kill and Def maps aren't consistent for NewReg!");
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// We just went back in time and modified history; the
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// liveness information for the anti-depenence reg is now
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// inconsistent. Set the state as if it were dead.
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Classes[NewReg] = Classes[AntiDepReg];
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DefIndices[NewReg] = DefIndices[AntiDepReg];
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KillIndices[NewReg] = KillIndices[AntiDepReg];
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assert(((KillIndices[NewReg] == ~0u) !=
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(DefIndices[NewReg] == ~0u)) &&
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"Kill and Def maps aren't consistent for NewReg!");
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Classes[AntiDepReg] = 0;
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DefIndices[AntiDepReg] = KillIndices[AntiDepReg];
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KillIndices[AntiDepReg] = ~0u;
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assert(((KillIndices[AntiDepReg] == ~0u) !=
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(DefIndices[AntiDepReg] == ~0u)) &&
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"Kill and Def maps aren't consistent for AntiDepReg!");
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Classes[AntiDepReg] = 0;
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DefIndices[AntiDepReg] = KillIndices[AntiDepReg];
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KillIndices[AntiDepReg] = ~0u;
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assert(((KillIndices[AntiDepReg] == ~0u) !=
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(DefIndices[AntiDepReg] == ~0u)) &&
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"Kill and Def maps aren't consistent for AntiDepReg!");
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RegRefs.erase(AntiDepReg);
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Changed = true;
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LastNewReg[AntiDepReg] = NewReg;
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break;
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}
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RegRefs.erase(AntiDepReg);
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Changed = true;
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LastNewReg[AntiDepReg] = NewReg;
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}
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}
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