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Mark CALL instructions as having a Use of ESP/RSP.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56911 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -95,7 +95,8 @@ let isCall = 1 in
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FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, ST1,
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MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
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XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS] in {
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XMM8, XMM9, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, EFLAGS],
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Uses = [RSP] in {
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def CALL64pcrel32 : I<0xE8, RawFrm, (outs), (ins i64imm:$dst, variable_ops),
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"call\t${dst:call}", []>;
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def CALL64r : I<0xFF, MRM2r, (outs), (ins GR64:$dst, variable_ops),
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@ -334,7 +334,7 @@ let neverHasSideEffects = 1 in
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def NOOP : I<0x90, RawFrm, (outs), (ins), "nop", []>;
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// PIC base
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let neverHasSideEffects = 1, isNotDuplicable = 1 in
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let neverHasSideEffects = 1, isNotDuplicable = 1, Uses = [ESP] in
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def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins piclabel:$label),
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"call\t$label\n\tpop{l}\t$reg", []>;
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@ -414,7 +414,8 @@ let isCall = 1 in
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// All calls clobber the non-callee saved registers...
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let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
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MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
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XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] in {
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XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS],
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Uses = [ESP] in {
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def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops),
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"call\t${dst:call}", []>;
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def CALL32r : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
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