Add support for the printImplicitDefsBefore flag

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12893 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2004-04-13 17:18:39 +00:00
parent 5deaa7a73d
commit 266538350a
4 changed files with 69 additions and 10 deletions

View File

@ -105,6 +105,7 @@ namespace {
} }
void printImplUsesBefore(const TargetInstrDescriptor &Desc); void printImplUsesBefore(const TargetInstrDescriptor &Desc);
bool printImplDefsBefore(const TargetInstrDescriptor &Desc);
bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC); bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC);
bool printImplDefsAfter(const TargetInstrDescriptor &Desc, const bool LC); bool printImplDefsAfter(const TargetInstrDescriptor &Desc, const bool LC);
void printMachineInstruction(const MachineInstr *MI); void printMachineInstruction(const MachineInstr *MI);
@ -544,6 +545,30 @@ void Printer::printImplUsesBefore(const TargetInstrDescriptor &Desc) {
} }
} }
/// printImplDefsBefore - Emit the implicit-def registers for the instruction
/// described by DESC, if its PrintImplUsesBefore flag is set. Return true if
/// we printed any registers.
///
bool Printer::printImplDefsBefore(const TargetInstrDescriptor &Desc) {
bool Printed = false;
const MRegisterInfo &RI = *TM.getRegisterInfo();
if (Desc.TSFlags & X86II::PrintImplDefsBefore) {
const unsigned *p = Desc.ImplicitDefs;
if (*p) {
O << (Printed ? ", %" : "%") << RI.get (*p).Name;
Printed = true;
++p;
}
while (*p) {
// Bug Workaround: See note in Printer::doInitialization about %.
O << ", %" << RI.get(*p).Name;
++p;
}
}
return Printed;
}
/// printImplUsesAfter - Emit the implicit-use registers for the instruction /// printImplUsesAfter - Emit the implicit-use registers for the instruction
/// described by DESC, if its PrintImplUsesAfter flag is set. /// described by DESC, if its PrintImplUsesAfter flag is set.
/// ///
@ -655,22 +680,25 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
case X86II::RawFrm: case X86II::RawFrm:
{ {
bool LeadingComma = false;
// The accepted forms of Raw instructions are: // The accepted forms of Raw instructions are:
// 1. nop - No operand required // 1. nop - No operand required
// 2. jmp foo - PC relative displacement operand // 2. jmp foo - PC relative displacement operand
// 3. call bar - GlobalAddress Operand or External Symbol Operand // 3. call bar - GlobalAddress Operand or External Symbol Operand
// 4. in AL, imm - Immediate operand
// //
assert(MI->getNumOperands() == 0 || assert(MI->getNumOperands() == 0 ||
(MI->getNumOperands() == 1 && (MI->getNumOperands() == 1 &&
(MI->getOperand(0).isPCRelativeDisp() || (MI->getOperand(0).isPCRelativeDisp() ||
MI->getOperand(0).isGlobalAddress() || MI->getOperand(0).isGlobalAddress() ||
MI->getOperand(0).isExternalSymbol())) && MI->getOperand(0).isExternalSymbol() ||
MI->getOperand(0).isImmediate())) &&
"Illegal raw instruction!"); "Illegal raw instruction!");
O << TII.getName(MI->getOpcode()) << " "; O << TII.getName(MI->getOpcode()) << " ";
bool LeadingComma = printImplDefsBefore(Desc);
if (MI->getNumOperands() == 1) { if (MI->getNumOperands() == 1) {
if (LeadingComma) O << ", ";
printOp(MI->getOperand(0), true); // Don't print "OFFSET"... printOp(MI->getOperand(0), true); // Don't print "OFFSET"...
LeadingComma = true; LeadingComma = true;
} }

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@ -41,6 +41,7 @@ def X86InstrInfo : InstrInfo {
"FPFormBits", "FPFormBits",
"printImplicitUsesAfter", "printImplicitUsesAfter",
"printImplicitUsesBefore", "printImplicitUsesBefore",
"printImplicitDefsBefore",
"printImplicitDefsAfter", "printImplicitDefsAfter",
"Opcode"]; "Opcode"];
let TSFlagsShifts = [0, let TSFlagsShifts = [0,
@ -52,7 +53,8 @@ def X86InstrInfo : InstrInfo {
18, 18,
19, 19,
20, 20,
21]; 21,
22];
} }
def X86 : Target { def X86 : Target {

View File

@ -105,6 +105,7 @@ namespace {
} }
void printImplUsesBefore(const TargetInstrDescriptor &Desc); void printImplUsesBefore(const TargetInstrDescriptor &Desc);
bool printImplDefsBefore(const TargetInstrDescriptor &Desc);
bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC); bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC);
bool printImplDefsAfter(const TargetInstrDescriptor &Desc, const bool LC); bool printImplDefsAfter(const TargetInstrDescriptor &Desc, const bool LC);
void printMachineInstruction(const MachineInstr *MI); void printMachineInstruction(const MachineInstr *MI);
@ -544,6 +545,30 @@ void Printer::printImplUsesBefore(const TargetInstrDescriptor &Desc) {
} }
} }
/// printImplDefsBefore - Emit the implicit-def registers for the instruction
/// described by DESC, if its PrintImplUsesBefore flag is set. Return true if
/// we printed any registers.
///
bool Printer::printImplDefsBefore(const TargetInstrDescriptor &Desc) {
bool Printed = false;
const MRegisterInfo &RI = *TM.getRegisterInfo();
if (Desc.TSFlags & X86II::PrintImplDefsBefore) {
const unsigned *p = Desc.ImplicitDefs;
if (*p) {
O << (Printed ? ", %" : "%") << RI.get (*p).Name;
Printed = true;
++p;
}
while (*p) {
// Bug Workaround: See note in Printer::doInitialization about %.
O << ", %" << RI.get(*p).Name;
++p;
}
}
return Printed;
}
/// printImplUsesAfter - Emit the implicit-use registers for the instruction /// printImplUsesAfter - Emit the implicit-use registers for the instruction
/// described by DESC, if its PrintImplUsesAfter flag is set. /// described by DESC, if its PrintImplUsesAfter flag is set.
/// ///
@ -655,22 +680,25 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
case X86II::RawFrm: case X86II::RawFrm:
{ {
bool LeadingComma = false;
// The accepted forms of Raw instructions are: // The accepted forms of Raw instructions are:
// 1. nop - No operand required // 1. nop - No operand required
// 2. jmp foo - PC relative displacement operand // 2. jmp foo - PC relative displacement operand
// 3. call bar - GlobalAddress Operand or External Symbol Operand // 3. call bar - GlobalAddress Operand or External Symbol Operand
// 4. in AL, imm - Immediate operand
// //
assert(MI->getNumOperands() == 0 || assert(MI->getNumOperands() == 0 ||
(MI->getNumOperands() == 1 && (MI->getNumOperands() == 1 &&
(MI->getOperand(0).isPCRelativeDisp() || (MI->getOperand(0).isPCRelativeDisp() ||
MI->getOperand(0).isGlobalAddress() || MI->getOperand(0).isGlobalAddress() ||
MI->getOperand(0).isExternalSymbol())) && MI->getOperand(0).isExternalSymbol() ||
MI->getOperand(0).isImmediate())) &&
"Illegal raw instruction!"); "Illegal raw instruction!");
O << TII.getName(MI->getOpcode()) << " "; O << TII.getName(MI->getOpcode()) << " ";
bool LeadingComma = printImplDefsBefore(Desc);
if (MI->getNumOperands() == 1) { if (MI->getNumOperands() == 1) {
if (LeadingComma) O << ", ";
printOp(MI->getOperand(0), true); // Don't print "OFFSET"... printOp(MI->getOperand(0), true); // Don't print "OFFSET"...
LeadingComma = true; LeadingComma = true;
} }

View File

@ -171,11 +171,12 @@ namespace X86II {
// PrintImplDefsAfter - Print out implicit defs in the assembly output // PrintImplDefsAfter - Print out implicit defs in the assembly output
// after the normal operands. // after the normal operands.
PrintImplDefsAfter = 1 << 20, PrintImplDefsBefore = 1 << 20,
PrintImplDefsAfter = 1 << 21,
OpcodeShift = 21, OpcodeShift = 22,
OpcodeMask = 0xFF << OpcodeShift, OpcodeMask = 0xFF << OpcodeShift,
// Bits 26 -> 31 are unused // Bits 27 -> 31 are unused
}; };
} }