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Add support for the printImplicitDefsBefore flag
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12893 91177308-0d34-0410-b5e6-96231b3b80d8
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5deaa7a73d
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@ -105,6 +105,7 @@ namespace {
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}
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}
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void printImplUsesBefore(const TargetInstrDescriptor &Desc);
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void printImplUsesBefore(const TargetInstrDescriptor &Desc);
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bool printImplDefsBefore(const TargetInstrDescriptor &Desc);
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bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC);
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bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC);
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bool printImplDefsAfter(const TargetInstrDescriptor &Desc, const bool LC);
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bool printImplDefsAfter(const TargetInstrDescriptor &Desc, const bool LC);
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void printMachineInstruction(const MachineInstr *MI);
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void printMachineInstruction(const MachineInstr *MI);
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@ -544,6 +545,30 @@ void Printer::printImplUsesBefore(const TargetInstrDescriptor &Desc) {
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}
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}
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}
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}
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/// printImplDefsBefore - Emit the implicit-def registers for the instruction
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/// described by DESC, if its PrintImplUsesBefore flag is set. Return true if
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/// we printed any registers.
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///
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bool Printer::printImplDefsBefore(const TargetInstrDescriptor &Desc) {
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bool Printed = false;
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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if (Desc.TSFlags & X86II::PrintImplDefsBefore) {
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const unsigned *p = Desc.ImplicitDefs;
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if (*p) {
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O << (Printed ? ", %" : "%") << RI.get (*p).Name;
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Printed = true;
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++p;
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}
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while (*p) {
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// Bug Workaround: See note in Printer::doInitialization about %.
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O << ", %" << RI.get(*p).Name;
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++p;
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}
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}
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return Printed;
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}
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/// printImplUsesAfter - Emit the implicit-use registers for the instruction
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/// printImplUsesAfter - Emit the implicit-use registers for the instruction
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/// described by DESC, if its PrintImplUsesAfter flag is set.
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/// described by DESC, if its PrintImplUsesAfter flag is set.
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///
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///
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@ -655,22 +680,25 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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case X86II::RawFrm:
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case X86II::RawFrm:
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{
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{
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bool LeadingComma = false;
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// The accepted forms of Raw instructions are:
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// The accepted forms of Raw instructions are:
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// 1. nop - No operand required
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// 1. nop - No operand required
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// 2. jmp foo - PC relative displacement operand
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// 2. jmp foo - PC relative displacement operand
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// 3. call bar - GlobalAddress Operand or External Symbol Operand
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// 3. call bar - GlobalAddress Operand or External Symbol Operand
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// 4. in AL, imm - Immediate operand
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//
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//
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assert(MI->getNumOperands() == 0 ||
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assert(MI->getNumOperands() == 0 ||
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(MI->getNumOperands() == 1 &&
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(MI->getNumOperands() == 1 &&
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(MI->getOperand(0).isPCRelativeDisp() ||
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(MI->getOperand(0).isPCRelativeDisp() ||
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MI->getOperand(0).isGlobalAddress() ||
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MI->getOperand(0).isGlobalAddress() ||
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MI->getOperand(0).isExternalSymbol())) &&
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MI->getOperand(0).isExternalSymbol() ||
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MI->getOperand(0).isImmediate())) &&
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"Illegal raw instruction!");
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"Illegal raw instruction!");
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O << TII.getName(MI->getOpcode()) << " ";
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O << TII.getName(MI->getOpcode()) << " ";
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bool LeadingComma = printImplDefsBefore(Desc);
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if (MI->getNumOperands() == 1) {
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if (MI->getNumOperands() == 1) {
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if (LeadingComma) O << ", ";
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printOp(MI->getOperand(0), true); // Don't print "OFFSET"...
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printOp(MI->getOperand(0), true); // Don't print "OFFSET"...
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LeadingComma = true;
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LeadingComma = true;
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}
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}
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@ -41,6 +41,7 @@ def X86InstrInfo : InstrInfo {
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"FPFormBits",
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"FPFormBits",
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"printImplicitUsesAfter",
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"printImplicitUsesAfter",
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"printImplicitUsesBefore",
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"printImplicitUsesBefore",
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"printImplicitDefsBefore",
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"printImplicitDefsAfter",
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"printImplicitDefsAfter",
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"Opcode"];
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"Opcode"];
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let TSFlagsShifts = [0,
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let TSFlagsShifts = [0,
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@ -52,7 +53,8 @@ def X86InstrInfo : InstrInfo {
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18,
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18,
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19,
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19,
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20,
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20,
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21];
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21,
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22];
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}
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}
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def X86 : Target {
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def X86 : Target {
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@ -105,6 +105,7 @@ namespace {
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}
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}
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void printImplUsesBefore(const TargetInstrDescriptor &Desc);
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void printImplUsesBefore(const TargetInstrDescriptor &Desc);
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bool printImplDefsBefore(const TargetInstrDescriptor &Desc);
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bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC);
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bool printImplUsesAfter(const TargetInstrDescriptor &Desc, const bool LC);
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bool printImplDefsAfter(const TargetInstrDescriptor &Desc, const bool LC);
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bool printImplDefsAfter(const TargetInstrDescriptor &Desc, const bool LC);
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void printMachineInstruction(const MachineInstr *MI);
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void printMachineInstruction(const MachineInstr *MI);
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@ -544,6 +545,30 @@ void Printer::printImplUsesBefore(const TargetInstrDescriptor &Desc) {
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}
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}
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}
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}
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/// printImplDefsBefore - Emit the implicit-def registers for the instruction
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/// described by DESC, if its PrintImplUsesBefore flag is set. Return true if
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/// we printed any registers.
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///
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bool Printer::printImplDefsBefore(const TargetInstrDescriptor &Desc) {
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bool Printed = false;
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const MRegisterInfo &RI = *TM.getRegisterInfo();
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if (Desc.TSFlags & X86II::PrintImplDefsBefore) {
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const unsigned *p = Desc.ImplicitDefs;
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if (*p) {
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O << (Printed ? ", %" : "%") << RI.get (*p).Name;
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Printed = true;
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++p;
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}
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while (*p) {
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// Bug Workaround: See note in Printer::doInitialization about %.
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O << ", %" << RI.get(*p).Name;
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++p;
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}
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}
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return Printed;
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}
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/// printImplUsesAfter - Emit the implicit-use registers for the instruction
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/// printImplUsesAfter - Emit the implicit-use registers for the instruction
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/// described by DESC, if its PrintImplUsesAfter flag is set.
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/// described by DESC, if its PrintImplUsesAfter flag is set.
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///
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///
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@ -655,22 +680,25 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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case X86II::RawFrm:
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case X86II::RawFrm:
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{
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{
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bool LeadingComma = false;
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// The accepted forms of Raw instructions are:
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// The accepted forms of Raw instructions are:
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// 1. nop - No operand required
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// 1. nop - No operand required
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// 2. jmp foo - PC relative displacement operand
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// 2. jmp foo - PC relative displacement operand
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// 3. call bar - GlobalAddress Operand or External Symbol Operand
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// 3. call bar - GlobalAddress Operand or External Symbol Operand
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// 4. in AL, imm - Immediate operand
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//
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//
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assert(MI->getNumOperands() == 0 ||
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assert(MI->getNumOperands() == 0 ||
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(MI->getNumOperands() == 1 &&
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(MI->getNumOperands() == 1 &&
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(MI->getOperand(0).isPCRelativeDisp() ||
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(MI->getOperand(0).isPCRelativeDisp() ||
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MI->getOperand(0).isGlobalAddress() ||
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MI->getOperand(0).isGlobalAddress() ||
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MI->getOperand(0).isExternalSymbol())) &&
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MI->getOperand(0).isExternalSymbol() ||
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MI->getOperand(0).isImmediate())) &&
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"Illegal raw instruction!");
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"Illegal raw instruction!");
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O << TII.getName(MI->getOpcode()) << " ";
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O << TII.getName(MI->getOpcode()) << " ";
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bool LeadingComma = printImplDefsBefore(Desc);
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if (MI->getNumOperands() == 1) {
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if (MI->getNumOperands() == 1) {
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if (LeadingComma) O << ", ";
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printOp(MI->getOperand(0), true); // Don't print "OFFSET"...
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printOp(MI->getOperand(0), true); // Don't print "OFFSET"...
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LeadingComma = true;
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LeadingComma = true;
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}
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}
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@ -171,11 +171,12 @@ namespace X86II {
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// PrintImplDefsAfter - Print out implicit defs in the assembly output
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// PrintImplDefsAfter - Print out implicit defs in the assembly output
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// after the normal operands.
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// after the normal operands.
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PrintImplDefsAfter = 1 << 20,
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PrintImplDefsBefore = 1 << 20,
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PrintImplDefsAfter = 1 << 21,
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OpcodeShift = 21,
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OpcodeShift = 22,
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OpcodeMask = 0xFF << OpcodeShift,
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OpcodeMask = 0xFF << OpcodeShift,
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// Bits 26 -> 31 are unused
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// Bits 27 -> 31 are unused
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};
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};
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}
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}
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