mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-08-05 13:26:55 +00:00
Make the use of the vmla and vmls VFP instructions controllable via cmd line.
Preliminary testing shows significant performance wins by not using these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99436 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -1369,6 +1369,20 @@ class ADbI<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops,
|
||||
let Inst{4} = op4;
|
||||
}
|
||||
|
||||
// Double precision, binary, VML[AS] (for additional predicate)
|
||||
class ADbI_vmlX<bits<5> opcod1, bits<2> opcod2, bit op6, bit op4, dag oops,
|
||||
dag iops, InstrItinClass itin, string opc, string asm,
|
||||
list<dag> pattern>
|
||||
: VFPAI<oops, iops, VFPBinaryFrm, itin, opc, asm, pattern> {
|
||||
let Inst{27-23} = opcod1;
|
||||
let Inst{21-20} = opcod2;
|
||||
let Inst{11-8} = 0b1011;
|
||||
let Inst{6} = op6;
|
||||
let Inst{4} = op4;
|
||||
list<Predicate> Predicates = [HasVFP2, UseVMLx];
|
||||
}
|
||||
|
||||
|
||||
// Single precision, unary
|
||||
class ASuI<bits<5> opcod1, bits<2> opcod2, bits<4> opcod3, bits<2> opcod4,
|
||||
bit opcod5, dag oops, dag iops, InstrItinClass itin, string opc,
|
||||
|
Reference in New Issue
Block a user