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Another situation where ROTR is cheaper than ROTL.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55577 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2044,10 +2044,10 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS) {
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if (ConstantSDNode *SUBC =
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if (ConstantSDNode *SUBC =
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dyn_cast<ConstantSDNode>(LHSShiftAmt.getOperand(0))) {
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dyn_cast<ConstantSDNode>(LHSShiftAmt.getOperand(0))) {
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if (SUBC->getAPIntValue() == OpSizeInBits) {
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if (SUBC->getAPIntValue() == OpSizeInBits) {
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if (HasROTL)
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if (HasROTR)
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return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).getNode();
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else
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return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).getNode();
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return DAG.getNode(ISD::ROTR, VT, LHSShiftArg, RHSShiftAmt).getNode();
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else
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return DAG.getNode(ISD::ROTL, VT, LHSShiftArg, LHSShiftAmt).getNode();
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}
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}
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}
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}
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}
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}
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