6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-08-05 13:26:55 +00:00
Code Issues Projects Releases Wiki Activity

Update ARM frame index scavenging description

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102101 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach
2010-04-22 18:28:43 +00:00
parent cb28286b7b
commit 269e0fed84
1 changed files with 5 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
docs/ReleaseNotes.html
View File

@@ -737,8 +737,11 @@ href="http://blog.llvm.org/2010/04/arm-advanced-simd-neon-intrinsics-and.html">
helpful information if migrating code from GCC to LLVM-GCC.</li>
<li>The ARM and Thumb code generators now use register scavenging for stack
object address materialization.(FIXME: WHAT BENEFIT DOES THIS PROVIDE?)</li>
object address materialization. This allows the use of R3 as a general
purpose register in Thumb1 code, as it was previous reserved for use in
stack address materialization. Secondly, sequential uses of the same
value will now re-use the materialized constant.</li>
<li>The ARM backend now has good support for ARMv4 targets and has been tested
on StrongARM hardware. Previously, LLVM only supported ARMv4T and
newer chips.</li>