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R600: Do not mergevector after a vector reg is used
If we merge vector when a vector is used, it will generate an artificial antidependency that can prevent 2 tex/vtx instructions to use the same clause and thus generate extra clauses that reduce performance. There is no test case as such situation is really hard to predict. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187516 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -322,8 +322,17 @@ bool R600VectorRegMerger::runOnMachineFunction(MachineFunction &Fn) {
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for (MachineBasicBlock::iterator MII = MB->begin(), MIIE = MB->end();
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MII != MIIE; ++MII) {
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MachineInstr *MI = MII;
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if (MI->getOpcode() != AMDGPU::REG_SEQUENCE)
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if (MI->getOpcode() != AMDGPU::REG_SEQUENCE) {
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if (TII->get(MI->getOpcode()).TSFlags & R600_InstFlag::TEX_INST) {
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unsigned Reg = MI->getOperand(1).getReg();
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for (MachineRegisterInfo::def_iterator It = MRI->def_begin(Reg),
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E = MRI->def_end(); It != E; ++It) {
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RemoveMI(&(*It));
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}
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}
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continue;
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}
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RegSeqInfo RSI(*MRI, MI);
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