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Evict a lighter single interference before attempting to split a live range.

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Registers are not allocated strictly in spill weight order when live range
splitting and spilling has created new shorter intervals with higher spill
weights.

When one of the new heavy intervals conflicts with a single lighter interval,
simply evict the old interval instead of trying to split the heavy one.

The lighter interval is a better candidate for splitting, it has a smaller use
density.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125151 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2011-02-09 01:14:03 +00:00
parent c3dca3f9d4
commit 2710638db2
3 changed files with 64 additions and 36 deletions
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21
lib/CodeGen/RegAllocBasic.cpp
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@ -238,6 +238,18 @@ seedLiveVirtRegs(std::priority_queue<std::pair<float, unsigned> > &VirtRegQ) {
}
}
void RegAllocBase::assign(LiveInterval &VirtReg, unsigned PhysReg) {
assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment");
VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
PhysReg2LiveUnion[PhysReg].unify(VirtReg);
}
void RegAllocBase::unassign(LiveInterval &VirtReg, unsigned PhysReg) {
assert(VRM->getPhys(VirtReg.reg) == PhysReg && "Inconsistent unassign");
PhysReg2LiveUnion[PhysReg].extract(VirtReg);
VRM->clearVirt(VirtReg.reg);
}
// Top-level driver to manage the queue of unassigned VirtRegs and call the
// selectOrSplit implementation.
void RegAllocBase::allocatePhysRegs() {
@ -264,9 +276,7 @@ void RegAllocBase::allocatePhysRegs() {
if (AvailablePhysReg) {
DEBUG(dbgs() << "allocating: " << TRI->getName(AvailablePhysReg)
<< " for " << VirtReg << '\n');
assert(!VRM->hasPhys(VirtReg.reg) && "duplicate vreg in union");
VRM->assignVirt2Phys(VirtReg.reg, AvailablePhysReg);
PhysReg2LiveUnion[AvailablePhysReg].unify(VirtReg);
assign(VirtReg, AvailablePhysReg);
}
for (VirtRegVec::iterator I = SplitVRegs.begin(), E = SplitVRegs.end();
I != E; ++I) {
@ -308,10 +318,7 @@ void RegAllocBase::spillReg(LiveInterval& VirtReg, unsigned PhysReg,
// Deallocate the interfering vreg by removing it from the union.
// A LiveInterval instance may not be in a union during modification!
PhysReg2LiveUnion[PhysReg].extract(SpilledVReg);
// Clear the vreg assignment.
VRM->clearVirt(SpilledVReg.reg);
unassign(SpilledVReg, PhysReg);
// Spill the extracted interval.
spiller().spill(&SpilledVReg, SplitVRegs, PendingSpills);