Remove restriction on NEON alignment values. Some of the NEON ld/st

instructions use different values (e.g., 2-byte or 4-byte alignment).
Also fix ARMInstPrinter to print these alignments as bits instead of bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108386 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2010-07-14 23:54:43 +00:00
parent b5378ea12e
commit 273ff31e13
3 changed files with 4 additions and 9 deletions

View File

@ -519,9 +519,8 @@ namespace ARM_AM {
//
// This is stored in two operands [regaddr, align]. The first is the
// address register. The second operand is the value of the alignment
// specifier to use or zero if no explicit alignment.
// Valid alignments are: 0, 8, 16, and 32 bytes, depending on the specific
// instruction.
// specifier in bytes or zero if no explicit alignment.
// Valid alignments depend on the specific instruction.
//===--------------------------------------------------------------------===//
// NEON Modified Immediates

View File

@ -602,12 +602,8 @@ void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op,
O << "[" << getRegisterName(MO1.getReg());
if (MO2.getImm()) {
unsigned Align = MO2.getImm();
assert((Align == 8 || Align == 16 || Align == 32) &&
"unexpected NEON load/store alignment");
Align <<= 3;
// FIXME: Both darwin as and GNU as violate ARM docs here.
O << ", :" << Align;
O << ", :" << (MO2.getImm() << 3);
}
O << "]";
}

View File

@ -442,7 +442,7 @@ void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum,
O << "[" << getRegisterName(MO1.getReg());
if (MO2.getImm()) {
// FIXME: Both darwin as and GNU as violate ARM docs here.
O << ", :" << MO2.getImm();
O << ", :" << (MO2.getImm() << 3);
}
O << "]";
}