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Fix more MC layering violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135979 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -153,6 +153,11 @@ public:
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};
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} // end anonymous namespace
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namespace llvm {
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// FIXME: TableGen this?
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extern MCRegisterClass ARMMCRegisterClasses[]; // In ARMGenRegisterInfo.inc.
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}
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namespace {
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/// ARMOperand - Instances of this class represent a parsed ARM machine
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@ -971,9 +976,11 @@ public:
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SMLoc StartLoc, SMLoc EndLoc) {
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KindTy Kind = RegisterList;
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if (ARM::DPRRegClass.contains(Regs.front().first))
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if (llvm::ARMMCRegisterClasses[ARM::DPRRegClassID].
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contains(Regs.front().first))
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Kind = DPRRegisterList;
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else if (ARM::SPRRegClass.contains(Regs.front().first))
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else if (llvm::ARMMCRegisterClasses[ARM::SPRRegClassID].
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contains(Regs.front().first))
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Kind = SPRRegisterList;
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ARMOperand *Op = new ARMOperand(Kind);
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