Replace r169459 with something safer. Rather than having computeMaskedBits to

understand target implementation of any_extend / extload, just generate
zero_extend in place of any_extend for liveouts when the target knows the
zero_extend will be implicit (e.g. ARM ldrb / ldrh) or folded (e.g. x86 movz).

rdar://12771555


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169536 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/Target/TargetLowering.h

@@ -935,16 +935,6 @@ public:
                                               const SelectionDAG &DAG,
                                               unsigned Depth = 0) const;
 
-  /// computeMaskedBitsForAnyExtend - Since each target implement ANY_EXTEND
-  /// and ExtLoad nodes specifically, let the target determine which of the bits
-  /// specified in Mask are known to be either zero or one and return them in
-  /// the KnownZero/KnownOne bitsets.
-  virtual void computeMaskedBitsForAnyExtend(const SDValue Op,
-                                             APInt &KnownZero,
-                                             APInt &KnownOne,
-                                             const SelectionDAG &DAG,
-                                             unsigned Depth = 0) const;
-
   /// ComputeNumSignBitsForTargetNode - This method can be implemented by
   /// targets that want to expose additional information about sign bits to the
   /// DAG Combiner.
@@ -1723,6 +1713,13 @@ public:
     return false;
   }
 
+  /// isZExtFree - Return true if zero-extending the specific node Val to type
+  /// VT2 is free (either because it's implicitly zero-extended such as ARM
+  /// ldrb / ldrh or because it's folded such as X86 zero-extending loads).
+  virtual bool isZExtFree(SDValue Val, EVT VT2) const {
+    return isZExtFree(Val.getValueType(), VT2);
+  }
+
   /// isFNegFree - Return true if an fneg operation is free to the point where
   /// it is never worthwhile to replace it with a bitwise operation.
   virtual bool isFNegFree(EVT) const {