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Don't overwrite the opcode passed into the T1Special pattern.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120782 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2010-12-03 02:02:58 +00:00
parent 534a5e4305
commit 278b6e81c8
1 changed files with 5 additions and 4 deletions
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9
lib/Target/ARM/ARMInstrThumb.td
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@ -1010,8 +1010,8 @@ def tMOVr : T1I<(outs tGPR:$Rd), (ins tGPR:$Rm), IIC_iMOVr,
// A8.6.97
bits<4> Rd;
bits<4> Rm;
let Inst{7} = Rd{3};
let Inst{6-3} = Rm;
// Bits {7-6} are encoded by the T1Special value.
let Inst{5-3} = Rm{2-0};
let Inst{2-0} = Rd{2-0};
}
let Defs = [CPSR] in
@ -1032,7 +1032,7 @@ def tMOVgpr2tgpr : T1I<(outs tGPR:$Rd), (ins GPR:$Rm), IIC_iMOVr,
// A8.6.97
bits<4> Rd;
bits<4> Rm;
let Inst{7} = Rd{3};
// Bit {7} is encoded by the T1Special value.
let Inst{6-3} = Rm;
let Inst{2-0} = Rd{2-0};
}
@ -1042,8 +1042,9 @@ def tMOVtgpr2gpr : T1I<(outs GPR:$Rd), (ins tGPR:$Rm), IIC_iMOVr,
// A8.6.97
bits<4> Rd;
bits<4> Rm;
// Bit {6} is encoded by the T1Special value.
let Inst{7} = Rd{3};
let Inst{6-3} = Rm;
let Inst{5-3} = Rm{2-0};
let Inst{2-0} = Rd{2-0};
}
def tMOVgpr2gpr : T1I<(outs GPR:$Rd), (ins GPR:$Rm), IIC_iMOVr,