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Add XOP disassembler support. Fixes PR13933.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191874 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2013-10-03 05:17:48 +00:00
parent dfd1014ec3
commit 279d28265d
10 changed files with 383 additions and 129 deletions
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172
lib/Target/X86/Disassembler/X86DisassemblerDecoder.c
View File

@@ -81,6 +81,15 @@ static int modRMRequired(OpcodeType type,
case THREEBYTE_A7:
decision = &THREEBYTEA7_SYM;
break;
case XOP8_MAP:
decision = &XOP8_MAP_SYM;
break;
case XOP9_MAP:
decision = &XOP9_MAP_SYM;
break;
case XOPA_MAP:
decision = &XOPA_MAP_SYM;
break;
}
return decision->opcodeDecisions[insnContext].modRMDecisions[opcode].
@@ -122,6 +131,15 @@ static InstrUID decode(OpcodeType type,
case THREEBYTE_A7:
dec = &THREEBYTEA7_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
break;
case XOP8_MAP:
dec = &XOP8_MAP_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
break;
case XOP9_MAP:
dec = &XOP9_MAP_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
break;
case XOPA_MAP:
dec = &XOPA_MAP_SYM.opcodeDecisions[insnContext].modRMDecisions[opcode];
break;
}
switch (dec->modrm_type) {
@@ -428,7 +446,7 @@ static int readPrefixes(struct InternalInstruction* insn) {
dbgprintf(insn, "Found prefix 0x%hhx", byte);
}
insn->vexSize = 0;
insn->vexXopType = TYPE_NO_VEX_XOP;
if (byte == 0xc4) {
uint8_t byte1;
@@ -439,7 +457,7 @@ static int readPrefixes(struct InternalInstruction* insn) {
}
if (insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) {
insn->vexSize = 3;
insn->vexXopType = TYPE_VEX_3B;
insn->necessaryPrefixLocation = insn->readerCursor - 1;
}
else {
@@ -447,22 +465,22 @@ static int readPrefixes(struct InternalInstruction* insn) {
insn->necessaryPrefixLocation = insn->readerCursor - 1;
}
if (insn->vexSize == 3) {
insn->vexPrefix[0] = byte;
consumeByte(insn, &insn->vexPrefix[1]);
consumeByte(insn, &insn->vexPrefix[2]);
if (insn->vexXopType == TYPE_VEX_3B) {
insn->vexXopPrefix[0] = byte;
consumeByte(insn, &insn->vexXopPrefix[1]);
consumeByte(insn, &insn->vexXopPrefix[2]);
/* We simulate the REX prefix for simplicity's sake */
if (insn->mode == MODE_64BIT) {
insn->rexPrefix = 0x40
| (wFromVEX3of3(insn->vexPrefix[2]) << 3)
| (rFromVEX2of3(insn->vexPrefix[1]) << 2)
| (xFromVEX2of3(insn->vexPrefix[1]) << 1)
| (bFromVEX2of3(insn->vexPrefix[1]) << 0);
| (wFromVEX3of3(insn->vexXopPrefix[2]) << 3)
| (rFromVEX2of3(insn->vexXopPrefix[1]) << 2)
| (xFromVEX2of3(insn->vexXopPrefix[1]) << 1)
| (bFromVEX2of3(insn->vexXopPrefix[1]) << 0);
}
switch (ppFromVEX3of3(insn->vexPrefix[2]))
switch (ppFromVEX3of3(insn->vexXopPrefix[2]))
{
default:
break;
@@ -471,7 +489,9 @@ static int readPrefixes(struct InternalInstruction* insn) {
break;
}
dbgprintf(insn, "Found VEX prefix 0x%hhx 0x%hhx 0x%hhx", insn->vexPrefix[0], insn->vexPrefix[1], insn->vexPrefix[2]);
dbgprintf(insn, "Found VEX prefix 0x%hhx 0x%hhx 0x%hhx",
insn->vexXopPrefix[0], insn->vexXopPrefix[1],
insn->vexXopPrefix[2]);
}
}
else if (byte == 0xc5) {
@@ -483,22 +503,22 @@ static int readPrefixes(struct InternalInstruction* insn) {
}
if (insn->mode == MODE_64BIT || (byte1 & 0xc0) == 0xc0) {
insn->vexSize = 2;
insn->vexXopType = TYPE_VEX_2B;
}
else {
unconsumeByte(insn);
}
if (insn->vexSize == 2) {
insn->vexPrefix[0] = byte;
consumeByte(insn, &insn->vexPrefix[1]);
if (insn->vexXopType == TYPE_VEX_2B) {
insn->vexXopPrefix[0] = byte;
consumeByte(insn, &insn->vexXopPrefix[1]);
if (insn->mode == MODE_64BIT) {
insn->rexPrefix = 0x40
| (rFromVEX2of2(insn->vexPrefix[1]) << 2);
| (rFromVEX2of2(insn->vexXopPrefix[1]) << 2);
}
switch (ppFromVEX2of2(insn->vexPrefix[1]))
switch (ppFromVEX2of2(insn->vexXopPrefix[1]))
{
default:
break;
@@ -507,7 +527,53 @@ static int readPrefixes(struct InternalInstruction* insn) {
break;
}
dbgprintf(insn, "Found VEX prefix 0x%hhx 0x%hhx", insn->vexPrefix[0], insn->vexPrefix[1]);
dbgprintf(insn, "Found VEX prefix 0x%hhx 0x%hhx", insn->vexXopPrefix[0], insn->vexXopPrefix[1]);
}
}
else if (byte == 0x8f) {
uint8_t byte1;
if (lookAtByte(insn, &byte1)) {
dbgprintf(insn, "Couldn't read second byte of XOP");
return -1;
}
if ((byte1 & 0x38) != 0x0) { // 0 in these 3 bits is a POP instruction.
insn->vexXopType = TYPE_XOP;
insn->necessaryPrefixLocation = insn->readerCursor - 1;
}
else {
unconsumeByte(insn);
insn->necessaryPrefixLocation = insn->readerCursor - 1;
}
if (insn->vexXopType == TYPE_XOP) {
insn->vexXopPrefix[0] = byte;
consumeByte(insn, &insn->vexXopPrefix[1]);
consumeByte(insn, &insn->vexXopPrefix[2]);
/* We simulate the REX prefix for simplicity's sake */
if (insn->mode == MODE_64BIT) {
insn->rexPrefix = 0x40
| (wFromXOP3of3(insn->vexXopPrefix[2]) << 3)
| (rFromXOP2of3(insn->vexXopPrefix[1]) << 2)
| (xFromXOP2of3(insn->vexXopPrefix[1]) << 1)
| (bFromXOP2of3(insn->vexXopPrefix[1]) << 0);
}
switch (ppFromXOP3of3(insn->vexXopPrefix[2]))
{
default:
break;
case VEX_PREFIX_66:
hasOpSize = TRUE;
break;
}
dbgprintf(insn, "Found XOP prefix 0x%hhx 0x%hhx 0x%hhx",
insn->vexXopPrefix[0], insn->vexXopPrefix[1],
insn->vexXopPrefix[2]);
}
}
else {
@@ -582,12 +648,13 @@ static int readOpcode(struct InternalInstruction* insn) {
insn->opcodeType = ONEBYTE;
if (insn->vexSize == 3)
if (insn->vexXopType == TYPE_VEX_3B)
{
switch (mmmmmFromVEX2of3(insn->vexPrefix[1]))
switch (mmmmmFromVEX2of3(insn->vexXopPrefix[1]))
{
default:
dbgprintf(insn, "Unhandled m-mmmm field for instruction (0x%hhx)", mmmmmFromVEX2of3(insn->vexPrefix[1]));
dbgprintf(insn, "Unhandled m-mmmm field for instruction (0x%hhx)",
mmmmmFromVEX2of3(insn->vexXopPrefix[1]));
return -1;
case VEX_LOB_0F:
insn->opcodeType = TWOBYTE;
@@ -600,11 +667,30 @@ static int readOpcode(struct InternalInstruction* insn) {
return consumeByte(insn, &insn->opcode);
}
}
else if (insn->vexSize == 2)
else if (insn->vexXopType == TYPE_VEX_2B)
{
insn->opcodeType = TWOBYTE;
return consumeByte(insn, &insn->opcode);
}
else if (insn->vexXopType == TYPE_XOP)
{
switch (mmmmmFromXOP2of3(insn->vexXopPrefix[1]))
{
default:
dbgprintf(insn, "Unhandled m-mmmm field for instruction (0x%hhx)",
mmmmmFromVEX2of3(insn->vexXopPrefix[1]));
return -1;
case XOP_MAP_SELECT_8:
insn->opcodeType = XOP8_MAP;
return consumeByte(insn, &insn->opcode);
case XOP_MAP_SELECT_9:
insn->opcodeType = XOP9_MAP;
return consumeByte(insn, &insn->opcode);
case XOP_MAP_SELECT_A:
insn->opcodeType = XOPA_MAP;
return consumeByte(insn, &insn->opcode);
}
}
if (consumeByte(insn, &current))
return -1;
@@ -752,11 +838,11 @@ static int getID(struct InternalInstruction* insn, const void *miiArg) {
if (insn->mode == MODE_64BIT)
attrMask |= ATTR_64BIT;
if (insn->vexSize) {
if (insn->vexXopType != TYPE_NO_VEX_XOP) {
attrMask |= ATTR_VEX;
if (insn->vexSize == 3) {
switch (ppFromVEX3of3(insn->vexPrefix[2])) {
if (insn->vexXopType == TYPE_VEX_3B) {
switch (ppFromVEX3of3(insn->vexXopPrefix[2])) {
case VEX_PREFIX_66:
attrMask |= ATTR_OPSIZE;
break;
@@ -768,11 +854,11 @@ static int getID(struct InternalInstruction* insn, const void *miiArg) {
break;
}
if (lFromVEX3of3(insn->vexPrefix[2]))
if (lFromVEX3of3(insn->vexXopPrefix[2]))
attrMask |= ATTR_VEXL;
}
else if (insn->vexSize == 2) {
switch (ppFromVEX2of2(insn->vexPrefix[1])) {
else if (insn->vexXopType == TYPE_VEX_2B) {
switch (ppFromVEX2of2(insn->vexXopPrefix[1])) {
case VEX_PREFIX_66:
attrMask |= ATTR_OPSIZE;
break;
@@ -784,7 +870,23 @@ static int getID(struct InternalInstruction* insn, const void *miiArg) {
break;
}
if (lFromVEX2of2(insn->vexPrefix[1]))
if (lFromVEX2of2(insn->vexXopPrefix[1]))
attrMask |= ATTR_VEXL;
}
else if (insn->vexXopType == TYPE_XOP) {
switch (ppFromXOP3of3(insn->vexXopPrefix[2])) {
case VEX_PREFIX_66:
attrMask |= ATTR_OPSIZE;
break;
case VEX_PREFIX_F3:
attrMask |= ATTR_XS;
break;
case VEX_PREFIX_F2:
attrMask |= ATTR_XD;
break;
}
if (lFromXOP3of3(insn->vexXopPrefix[2]))
attrMask |= ATTR_VEXL;
}
else {
@@ -1450,10 +1552,12 @@ static int readImmediate(struct InternalInstruction* insn, uint8_t size) {
static int readVVVV(struct InternalInstruction* insn) {
dbgprintf(insn, "readVVVV()");
if (insn->vexSize == 3)
insn->vvvv = vvvvFromVEX3of3(insn->vexPrefix[2]);
else if (insn->vexSize == 2)
insn->vvvv = vvvvFromVEX2of2(insn->vexPrefix[1]);
if (insn->vexXopType == TYPE_VEX_3B)
insn->vvvv = vvvvFromVEX3of3(insn->vexXopPrefix[2]);
else if (insn->vexXopType == TYPE_VEX_2B)
insn->vvvv = vvvvFromVEX2of2(insn->vexXopPrefix[1]);
else if (insn->vexXopType == TYPE_XOP)
insn->vvvv = vvvvFromXOP3of3(insn->vexXopPrefix[2]);
else
return -1;

30
lib/Target/X86/Disassembler/X86DisassemblerDecoder.h
View File

@@ -59,6 +59,15 @@ extern "C" {
#define lFromVEX2of2(vex) (((vex) & 0x4) >> 2)
#define ppFromVEX2of2(vex) ((vex) & 0x3)
#define rFromXOP2of3(xop) (((~(xop)) & 0x80) >> 7)
#define xFromXOP2of3(xop) (((~(xop)) & 0x40) >> 6)
#define bFromXOP2of3(xop) (((~(xop)) & 0x20) >> 5)
#define mmmmmFromXOP2of3(xop) ((xop) & 0x1f)
#define wFromXOP3of3(xop) (((xop) & 0x80) >> 7)
#define vvvvFromXOP3of3(vex) (((~(vex)) & 0x78) >> 3)
#define lFromXOP3of3(xop) (((xop) & 0x4) >> 2)
#define ppFromXOP3of3(xop) ((xop) & 0x3)
/*
* These enums represent Intel registers for use by the decoder.
*/
@@ -444,9 +453,15 @@ typedef enum {
typedef enum {
VEX_LOB_0F = 0x1,
VEX_LOB_0F38 = 0x2,
VEX_LOB_0F3A = 0x3
VEX_LOB_0F3A = 0x3,
} VEXLeadingOpcodeByte;
typedef enum {
XOP_MAP_SELECT_8 = 0x8,
XOP_MAP_SELECT_9 = 0x9,
XOP_MAP_SELECT_A = 0xA
} XOPMapSelect;
/*
* VEXPrefixCode - Possible values for the VEX.pp field
*/
@@ -458,6 +473,13 @@ typedef enum {
VEX_PREFIX_F2 = 0x3
} VEXPrefixCode;
typedef enum {
TYPE_NO_VEX_XOP = 0x0,
TYPE_VEX_2B = 0x1,
TYPE_VEX_3B = 0x2,
TYPE_XOP = 0x3
} VEXXOPType;
typedef uint8_t BOOL;
/*
@@ -514,10 +536,10 @@ struct InternalInstruction {
uint8_t prefixPresent[0x100];
/* contains the location (for use with the reader) of the prefix byte */
uint64_t prefixLocations[0x100];
/* The value of the VEX prefix, if present */
uint8_t vexPrefix[3];
/* The value of the VEX/XOP prefix, if present */
uint8_t vexXopPrefix[3];
/* The length of the VEX prefix (0 if not present) */
uint8_t vexSize;
VEXXOPType vexXopType;
/* The value of the REX prefix, if present */
uint8_t rexPrefix;
/* The location where a mandatory prefix would have to be (i.e., right before

11
lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h
View File

@@ -32,6 +32,9 @@
#define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes
#define THREEBYTEA6_SYM x86DisassemblerThreeByteA6Opcodes
#define THREEBYTEA7_SYM x86DisassemblerThreeByteA7Opcodes
#define XOP8_MAP_SYM x86DisassemblerXOP8Opcodes
#define XOP9_MAP_SYM x86DisassemblerXOP9Opcodes
#define XOPA_MAP_SYM x86DisassemblerXOPAOpcodes
#define INSTRUCTIONS_STR "x86DisassemblerInstrSpecifiers"
#define CONTEXTS_STR "x86DisassemblerContexts"
@@ -41,6 +44,9 @@
#define THREEBYTE3A_STR "x86DisassemblerThreeByte3AOpcodes"
#define THREEBYTEA6_STR "x86DisassemblerThreeByteA6Opcodes"
#define THREEBYTEA7_STR "x86DisassemblerThreeByteA7Opcodes"
#define XOP8_MAP_STR "x86DisassemblerXOP8Opcodes"
#define XOP9_MAP_STR "x86DisassemblerXOP9Opcodes"
#define XOPA_MAP_STR "x86DisassemblerXOPAOpcodes"
/*
* Attributes of an instruction that must be known before the opcode can be
@@ -234,7 +240,10 @@ typedef enum {
THREEBYTE_38 = 2,
THREEBYTE_3A = 3,
THREEBYTE_A6 = 4,
THREEBYTE_A7 = 5
THREEBYTE_A7 = 5,
XOP8_MAP = 6,
XOP9_MAP = 7,
XOPA_MAP = 8
} OpcodeType;
/*