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Merging r223148:
------------------------------------------------------------------------ r223148 | dsanders | 2014-12-02 20:40:27 +0000 (Tue, 02 Dec 2014) | 17 lines [mips] Fix passing of small structures for big-endian O32. Summary: Like N32/N64, they must be passed in the upper bits of the register. The new code could be merged with the existing if-statements but I've refrained from doing this since it will make porting the O32 implementation to tablegen harder later. Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6463 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223457 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2268,6 +2268,9 @@ SDValue MipsTargetLowering::lowerFP_TO_SINT(SDValue Op,
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static bool CC_MipsO32(unsigned ValNo, MVT ValVT, MVT LocVT,
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CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
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CCState &State, const MCPhysReg *F64Regs) {
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const MipsSubtarget &Subtarget =
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State.getMachineFunction().getTarget()
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.getSubtarget<const MipsSubtarget>();
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static const unsigned IntRegsSize = 4, FloatRegsSize = 2;
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@ -2278,6 +2281,19 @@ static bool CC_MipsO32(unsigned ValNo, MVT ValVT, MVT LocVT,
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if (ArgFlags.isByVal())
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return true;
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// Promote i8 and i16
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if (ArgFlags.isInReg() && !Subtarget.isLittle()) {
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if (LocVT == MVT::i8 || LocVT == MVT::i16 || LocVT == MVT::i32) {
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LocVT = MVT::i32;
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if (ArgFlags.isSExt())
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LocInfo = CCValAssign::SExtUpper;
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else if (ArgFlags.isZExt())
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LocInfo = CCValAssign::ZExtUpper;
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else
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LocInfo = CCValAssign::AExtUpper;
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}
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}
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// Promote i8 and i16
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if (LocVT == MVT::i8 || LocVT == MVT::i16) {
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LocVT = MVT::i32;
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41
test/CodeGen/Mips/cconv/arguments-struct.ll
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41
test/CodeGen/Mips/cconv/arguments-struct.ll
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@ -0,0 +1,41 @@
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; RUN: llc -march=mips -relocation-model=static < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32-BE %s
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; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32-LE %s
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; RUN-TODO: llc -march=mips64 -relocation-model=static -mattr=-n64,+o32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32-BE %s
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; RUN-TODO: llc -march=mips64el -relocation-model=static -mattr=-n64,+o32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=O32-LE %s
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; RUN: llc -march=mips64 -relocation-model=static -mattr=-n64,+n32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=NEW-BE %s
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; RUN: llc -march=mips64el -relocation-model=static -mattr=-n64,+n32 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM32 --check-prefix=NEW-LE %s
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; RUN: llc -march=mips64 -relocation-model=static -mattr=-n64,+n64 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM64 --check-prefix=NEW-BE %s
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; RUN: llc -march=mips64el -relocation-model=static -mattr=-n64,+n64 < %s | FileCheck --check-prefix=ALL --check-prefix=SYM64 --check-prefix=NEW-LE %s
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; Test small structures for all ABI's and byte orders.
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;
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; N32/N64 are identical in this area so their checks have been combined into
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; the 'NEW' prefix (the N stands for New).
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@bytes = global [2 x i8] zeroinitializer
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define void @s_i8(i8 inreg %a) nounwind {
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entry:
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store i8 %a, i8* getelementptr inbounds ([2 x i8]* @bytes, i32 0, i32 1)
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ret void
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}
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; ALL-LABEL: s_i8:
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; SYM32-DAG: lui [[PTR_HI:\$[0-9]+]], %hi(bytes)
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; SYM32-DAG: addiu [[PTR:\$[0-9]+]], [[PTR_HI]], %lo(bytes)
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; SYM64-DAG: ld [[PTR:\$[0-9]+]], %got_disp(bytes)(
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; O32-BE-DAG: srl [[ARG:\$[0-9]+]], $4, 24
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; O32-BE-DAG: sb [[ARG]], 1([[PTR]])
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; O32-LE-DAG: sb $4, 1([[PTR]])
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; NEW-BE-DAG: dsrl [[ARG:\$[0-9]+]], $4, 56
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; NEW-BE-DAG: sb [[ARG]], 1([[PTR]])
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; NEW-LE-DAG: sb $4, 1([[PTR]])
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