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convert cmov mr patterns to use a multipattern. Death to redundancy
and verbosity git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115701 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -850,104 +850,32 @@ def : Pat<(X86cmp GR64:$src1, 0),
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// Conditional moves with folded loads with operands swapped and conditions
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// inverted.
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_B, EFLAGS),
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(CMOVAE16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_B, EFLAGS),
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(CMOVAE32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_AE, EFLAGS),
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(CMOVB16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_AE, EFLAGS),
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(CMOVB32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_E, EFLAGS),
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(CMOVNE16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_E, EFLAGS),
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(CMOVNE32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_NE, EFLAGS),
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(CMOVE16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_NE, EFLAGS),
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(CMOVE32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_BE, EFLAGS),
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(CMOVA16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_BE, EFLAGS),
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(CMOVA32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_A, EFLAGS),
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(CMOVBErm16 GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_A, EFLAGS),
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(CMOVBErm32 GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_L, EFLAGS),
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(CMOVGE16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_L, EFLAGS),
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(CMOVGE32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_GE, EFLAGS),
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(CMOVL16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_GE, EFLAGS),
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(CMOVL32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_LE, EFLAGS),
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(CMOVG16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_LE, EFLAGS),
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(CMOVG32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_G, EFLAGS),
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(CMOVLE16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_G, EFLAGS),
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(CMOVLE32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_P, EFLAGS),
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(CMOVNP16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_P, EFLAGS),
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(CMOVNP32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_NP, EFLAGS),
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(CMOVP16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_NP, EFLAGS),
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(CMOVP32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_S, EFLAGS),
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(CMOVNS16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_S, EFLAGS),
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(CMOVNS32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_NS, EFLAGS),
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(CMOVS16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_NS, EFLAGS),
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(CMOVS32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_O, EFLAGS),
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(CMOVNO16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_O, EFLAGS),
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(CMOVNO32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_NO, EFLAGS),
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(CMOVO16rm GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_NO, EFLAGS),
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(CMOVO32rm GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_B, EFLAGS),
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(CMOVAE64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_AE, EFLAGS),
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(CMOVB64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_E, EFLAGS),
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(CMOVNE64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_NE, EFLAGS),
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(CMOVE64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_BE, EFLAGS),
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(CMOVA64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_A, EFLAGS),
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(CMOVBErm64 GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_L, EFLAGS),
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(CMOVGE64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_GE, EFLAGS),
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(CMOVL64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_LE, EFLAGS),
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(CMOVG64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_G, EFLAGS),
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(CMOVLE64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_P, EFLAGS),
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(CMOVNP64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_NP, EFLAGS),
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(CMOVP64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_S, EFLAGS),
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(CMOVNS64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_NS, EFLAGS),
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(CMOVS64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_O, EFLAGS),
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(CMOVNO64rm GR64:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_NO, EFLAGS),
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(CMOVO64rm GR64:$src2, addr:$src1)>;
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multiclass CMOVmr<PatLeaf InvertedCond, Instruction Inst16, Instruction Inst32,
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Instruction Inst64> {
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def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS),
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(Inst16 GR16:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS),
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(Inst32 GR32:$src2, addr:$src1)>;
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def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS),
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(Inst64 GR64:$src2, addr:$src1)>;
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}
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defm CMOVAEmr : CMOVmr<X86_COND_B , CMOVAE16rm, CMOVAE32rm, CMOVAE64rm>;
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defm CMOVBmr : CMOVmr<X86_COND_AE, CMOVB16rm , CMOVB32rm , CMOVB64rm>;
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defm CMOVNEmr : CMOVmr<X86_COND_E , CMOVNE16rm, CMOVNE32rm, CMOVNE64rm>;
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defm CMOVEmr : CMOVmr<X86_COND_NE, CMOVE16rm , CMOVE32rm , CMOVE64rm>;
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defm CMOVAmr : CMOVmr<X86_COND_BE, CMOVA16rm , CMOVA32rm , CMOVA64rm>;
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defm CMOVBEmr : CMOVmr<X86_COND_A , CMOVBErm16, CMOVBErm32, CMOVBErm64>;
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defm CMOVGEmr : CMOVmr<X86_COND_L , CMOVGE16rm, CMOVGE32rm, CMOVGE64rm>;
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defm CMOVLmr : CMOVmr<X86_COND_GE, CMOVL16rm , CMOVL32rm , CMOVL64rm>;
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defm CMOVGmr : CMOVmr<X86_COND_LE, CMOVG16rm , CMOVG32rm , CMOVG64rm>;
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defm CMOVLEmr : CMOVmr<X86_COND_G , CMOVLE16rm, CMOVLE32rm, CMOVLE64rm>;
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defm CMOVNPmr : CMOVmr<X86_COND_P , CMOVNP16rm, CMOVNP32rm, CMOVNP64rm>;
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defm CMOVPmr : CMOVmr<X86_COND_NP, CMOVP16rm , CMOVP32rm , CMOVP64rm>;
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defm CMOVNSmr : CMOVmr<X86_COND_S , CMOVNS16rm, CMOVNS32rm, CMOVNS64rm>;
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defm CMOVSmr : CMOVmr<X86_COND_NS, CMOVS16rm , CMOVS32rm , CMOVS64rm>;
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defm CMOVNOmr : CMOVmr<X86_COND_O , CMOVNO16rm, CMOVNO32rm, CMOVNO64rm>;
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defm CMOVOmr : CMOVmr<X86_COND_NO, CMOVO16rm , CMOVO32rm , CMOVO64rm>;
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// zextload bool -> zextload byte
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def : Pat<(zextloadi8i1 addr:$src), (MOV8rm addr:$src)>;
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