6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-23 14:25:07 +00:00
Code Issues Projects Releases Wiki Activity

[SparcV9] Adds support for branch on integer register instructions (BPr) and conditional moves on integer register (MOVr/FMOVr).

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202628 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Venkatraman Govindaraju
2014-03-02 09:46:56 +00:00
parent a9fe27ffb3
commit 2871375882
9 changed files with 243 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
View File

@@ -39,6 +39,12 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
case Sparc::fixup_sparc_br19:
return (Value >> 2) & 0x7ffff;
case Sparc::fixup_sparc_br16_2:
return (Value >> 2) & 0xc000;
case Sparc::fixup_sparc_br16_14:
return (Value >> 2) & 0x3fff;
case Sparc::fixup_sparc_pc22:
case Sparc::fixup_sparc_got22:
case Sparc::fixup_sparc_tls_gd_hi22:
@@ -106,6 +112,8 @@ namespace {
{ "fixup_sparc_call30", 2, 30, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_sparc_br22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_sparc_br19", 13, 19, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_sparc_br16_2", 10, 2, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_sparc_br16_14", 18, 14, MCFixupKindInfo::FKF_IsPCRel },
{ "fixup_sparc_hi22", 10, 22, 0 },
{ "fixup_sparc_lo10", 22, 10, 0 },
{ "fixup_sparc_h44", 10, 22, 0 },