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Add vmfunc instruction to X86 assembler and disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150899 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -233,8 +233,9 @@ namespace X86II {
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MRM_C1 = 33, MRM_C2 = 34, MRM_C3 = 35, MRM_C4 = 36,
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MRM_C1 = 33, MRM_C2 = 34, MRM_C3 = 35, MRM_C4 = 36,
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MRM_C8 = 37, MRM_C9 = 38, MRM_E8 = 39, MRM_F0 = 40,
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MRM_C8 = 37, MRM_C9 = 38, MRM_E8 = 39, MRM_F0 = 40,
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MRM_F8 = 41, MRM_F9 = 42, MRM_D0 = 45, MRM_D1 = 46,
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MRM_F8 = 41, MRM_F9 = 42, MRM_D0 = 45, MRM_D1 = 46,
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MRM_D8 = 47, MRM_D9 = 48, MRM_DA = 49, MRM_DB = 50,
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MRM_D4 = 47, MRM_D8 = 48, MRM_D9 = 49, MRM_DA = 50,
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MRM_DC = 51, MRM_DD = 52, MRM_DE = 53, MRM_DF = 54,
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MRM_DB = 51, MRM_DC = 52, MRM_DD = 53, MRM_DE = 54,
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MRM_DF = 55,
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/// RawFrmImm8 - This is used for the ENTER instruction, which has two
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/// RawFrmImm8 - This is used for the ENTER instruction, which has two
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/// immediates, the first of which is a 16-bit immediate (specified by
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/// immediates, the first of which is a 16-bit immediate (specified by
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@ -534,10 +535,11 @@ namespace X86II {
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case X86II::MRM_E8: case X86II::MRM_F0:
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case X86II::MRM_E8: case X86II::MRM_F0:
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case X86II::MRM_F8: case X86II::MRM_F9:
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case X86II::MRM_F8: case X86II::MRM_F9:
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case X86II::MRM_D0: case X86II::MRM_D1:
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case X86II::MRM_D0: case X86II::MRM_D1:
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case X86II::MRM_D8: case X86II::MRM_D9:
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case X86II::MRM_D4: case X86II::MRM_D8:
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case X86II::MRM_DA: case X86II::MRM_DB:
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case X86II::MRM_D9: case X86II::MRM_DA:
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case X86II::MRM_DC: case X86II::MRM_DD:
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case X86II::MRM_DB: case X86II::MRM_DC:
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case X86II::MRM_DE: case X86II::MRM_DF:
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case X86II::MRM_DD: case X86II::MRM_DE:
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case X86II::MRM_DF:
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return -1;
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return -1;
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}
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}
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}
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}
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@ -1062,12 +1062,13 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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case X86II::MRM_C3: case X86II::MRM_C4:
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case X86II::MRM_C3: case X86II::MRM_C4:
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case X86II::MRM_C8: case X86II::MRM_C9:
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case X86II::MRM_C8: case X86II::MRM_C9:
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case X86II::MRM_D0: case X86II::MRM_D1:
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case X86II::MRM_D0: case X86II::MRM_D1:
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case X86II::MRM_D8: case X86II::MRM_D9:
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case X86II::MRM_D4: case X86II::MRM_D8:
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case X86II::MRM_DA: case X86II::MRM_DB:
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case X86II::MRM_D9: case X86II::MRM_DA:
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case X86II::MRM_DC: case X86II::MRM_DD:
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case X86II::MRM_DB: case X86II::MRM_DC:
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case X86II::MRM_DE: case X86II::MRM_DF:
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case X86II::MRM_DD: case X86II::MRM_DE:
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case X86II::MRM_E8: case X86II::MRM_F0:
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case X86II::MRM_DF: case X86II::MRM_E8:
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case X86II::MRM_F8: case X86II::MRM_F9:
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case X86II::MRM_F0: case X86II::MRM_F8:
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case X86II::MRM_F9:
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EmitByte(BaseOpcode, CurByte, OS);
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EmitByte(BaseOpcode, CurByte, OS);
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unsigned char MRM;
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unsigned char MRM;
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@ -1081,6 +1082,7 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS,
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case X86II::MRM_C9: MRM = 0xC9; break;
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case X86II::MRM_C9: MRM = 0xC9; break;
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case X86II::MRM_D0: MRM = 0xD0; break;
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case X86II::MRM_D0: MRM = 0xD0; break;
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case X86II::MRM_D1: MRM = 0xD1; break;
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case X86II::MRM_D1: MRM = 0xD1; break;
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case X86II::MRM_D4: MRM = 0xD4; break;
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case X86II::MRM_D8: MRM = 0xD8; break;
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case X86II::MRM_D8: MRM = 0xD8; break;
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case X86II::MRM_D9: MRM = 0xD9; break;
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case X86II::MRM_D9: MRM = 0xD9; break;
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case X86II::MRM_DA: MRM = 0xDA; break;
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case X86II::MRM_DA: MRM = 0xDA; break;
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@ -43,14 +43,15 @@ def RawFrmImm8 : Format<43>;
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def RawFrmImm16 : Format<44>;
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def RawFrmImm16 : Format<44>;
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def MRM_D0 : Format<45>;
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def MRM_D0 : Format<45>;
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def MRM_D1 : Format<46>;
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def MRM_D1 : Format<46>;
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def MRM_D8 : Format<47>;
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def MRM_D4 : Format<47>;
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def MRM_D9 : Format<48>;
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def MRM_D8 : Format<48>;
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def MRM_DA : Format<49>;
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def MRM_D9 : Format<49>;
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def MRM_DB : Format<50>;
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def MRM_DA : Format<50>;
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def MRM_DC : Format<51>;
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def MRM_DB : Format<51>;
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def MRM_DD : Format<52>;
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def MRM_DC : Format<52>;
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def MRM_DE : Format<53>;
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def MRM_DD : Format<53>;
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def MRM_DF : Format<54>;
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def MRM_DE : Format<54>;
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def MRM_DF : Format<55>;
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// ImmType - This specifies the immediate type used by an instruction. This is
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// ImmType - This specifies the immediate type used by an instruction. This is
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// part of the ad-hoc solution used to emit machine instruction encodings by our
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// part of the ad-hoc solution used to emit machine instruction encodings by our
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@ -33,6 +33,8 @@ def INVVPID64 : I<0x81, MRMSrcMem, (outs), (ins GR64:$src1, i128mem:$src2),
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def VMCALL : I<0x01, MRM_C1, (outs), (ins), "vmcall", []>, TB;
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def VMCALL : I<0x01, MRM_C1, (outs), (ins), "vmcall", []>, TB;
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def VMCLEARm : I<0xC7, MRM6m, (outs), (ins i64mem:$vmcs),
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def VMCLEARm : I<0xC7, MRM6m, (outs), (ins i64mem:$vmcs),
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"vmclear\t$vmcs", []>, OpSize, TB;
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"vmclear\t$vmcs", []>, OpSize, TB;
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// OF 01 D4
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def VMFUNC : I<0x01, MRM_D4, (outs), (ins), "vmfunc", []>, TB;
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// 0F 01 C2
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// 0F 01 C2
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def VMLAUNCH : I<0x01, MRM_C2, (outs), (ins), "vmlaunch", []>, TB;
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def VMLAUNCH : I<0x01, MRM_C2, (outs), (ins), "vmlaunch", []>, TB;
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// 0F 01 C3
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// 0F 01 C3
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@ -28,6 +28,9 @@
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# CHECK: vmcall
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# CHECK: vmcall
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0x0f 0x01 0xc1
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0x0f 0x01 0xc1
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# CHECK: vmfunc
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0x0f 0x01 0xd4
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# CHECK: vmlaunch
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# CHECK: vmlaunch
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0x0f 0x01 0xc2
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0x0f 0x01 0xc2
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@ -63,6 +63,9 @@
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# CHECK: vmcall
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# CHECK: vmcall
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0x0f 0x01 0xc1
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0x0f 0x01 0xc1
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# CHECK: vmfunc
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0x0f 0x01 0xd4
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# CHECK: vmlaunch
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# CHECK: vmlaunch
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0x0f 0x01 0xc2
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0x0f 0x01 0xc2
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@ -18408,6 +18408,9 @@
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// CHECK: vmcall
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// CHECK: vmcall
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vmcall
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vmcall
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// CHECK: vmfunc
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vmfunc
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// CHECK: vmclear 3735928559(%ebx,%ecx,8)
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// CHECK: vmclear 3735928559(%ebx,%ecx,8)
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vmclear 0xdeadbeef(%ebx,%ecx,8)
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vmclear 0xdeadbeef(%ebx,%ecx,8)
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@ -28,6 +28,9 @@
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vmcall
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vmcall
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// CHECK: vmcall
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// CHECK: vmcall
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// CHECK: encoding: [0x0f,0x01,0xc1]
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// CHECK: encoding: [0x0f,0x01,0xc1]
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vmfunc
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// CHECK: vmfunc
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// CHECK: encoding: [0x0f,0x01,0xd4]
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vmlaunch
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vmlaunch
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// CHECK: vmlaunch
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// CHECK: vmlaunch
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// CHECK: encoding: [0x0f,0x01,0xc2]
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// CHECK: encoding: [0x0f,0x01,0xc2]
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@ -37,14 +37,15 @@ using namespace llvm;
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MAP(F9, 42) \
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MAP(F9, 42) \
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MAP(D0, 45) \
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MAP(D0, 45) \
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MAP(D1, 46) \
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MAP(D1, 46) \
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MAP(D8, 47) \
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MAP(D4, 47) \
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MAP(D9, 48) \
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MAP(D8, 48) \
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MAP(DA, 49) \
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MAP(D9, 49) \
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MAP(DB, 50) \
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MAP(DA, 50) \
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MAP(DC, 51) \
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MAP(DB, 51) \
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MAP(DD, 52) \
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MAP(DC, 52) \
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MAP(DE, 53) \
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MAP(DD, 53) \
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MAP(DF, 54)
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MAP(DE, 54) \
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MAP(DF, 55)
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// A clone of X86 since we can't depend on something that is generated.
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// A clone of X86 since we can't depend on something that is generated.
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namespace X86Local {
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namespace X86Local {
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