6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-21 21:29:41 +00:00
Code Issues Projects Releases Wiki Activity

fix a small optimization opertunity and make gcc happy

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21143 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Lenharth 2005-04-07 18:15:28 +00:00
parent 67255a1d17
commit 2966e84a8d
1 changed files with 1 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
lib/Target/Alpha/AlphaISelPattern.cpp
View File

@ -1090,7 +1090,7 @@ unsigned ISel::SelectExprFP(SDOperand N, unsigned Result)
unsigned ISel::SelectExpr(SDOperand N) { unsigned ISel::SelectExpr(SDOperand N) {
unsigned Result; unsigned Result;
unsigned Tmp1, Tmp2, Tmp3; unsigned Tmp1, Tmp2 = 0, Tmp3;
unsigned Opc = 0; unsigned Opc = 0;
unsigned opcode = N.getOpcode(); unsigned opcode = N.getOpcode();
@ -1448,7 +1448,6 @@ unsigned ISel::SelectExpr(SDOperand N) {
Tmp2 = SelectExpr(N.getOperand(0).getOperand(1)); Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
Tmp1 = SelectExpr(N.getOperand(0).getOperand(0)); Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2); BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);
} }
return Result; return Result;
@ -1810,7 +1809,6 @@ unsigned ISel::SelectExpr(SDOperand N) {
{ {
unsigned k = ExactLog2(abs(CSD->getSignExtended())); unsigned k = ExactLog2(abs(CSD->getSignExtended()));
Tmp1 = SelectExpr(N.getOperand(0)); Tmp1 = SelectExpr(N.getOperand(0));
Tmp2 = MakeReg(MVT::i64);
if (k == 1) if (k == 1)
Tmp2 = Tmp1; Tmp2 = Tmp1;
else else