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Experimental fix for PR4960.
- Could we just always implement this as __clear_cache for __GNUC__? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81655 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -37,13 +37,16 @@ void llvm::sys::Memory::InvalidateInstructionCache(const void *Addr,
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// icache invalidation for PPC and ARM.
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// icache invalidation for PPC and ARM.
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#if defined(__APPLE__)
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#if defined(__APPLE__)
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#if (defined(__POWERPC__) || defined (__ppc__) || \
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# if (defined(__POWERPC__) || defined (__ppc__) || \
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defined(_POWER) || defined(_ARCH_PPC)) || defined(__arm__)
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defined(_POWER) || defined(_ARCH_PPC)) || defined(__arm__)
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sys_icache_invalidate(Addr, Len);
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sys_icache_invalidate(Addr, Len);
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#endif
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# endif
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#else
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#else
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#if (defined(__POWERPC__) || defined (__ppc__) || \
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defined(_POWER) || defined(_ARCH_PPC)) && defined(__GNUC__)
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# if (defined(__POWERPC__) || defined (__ppc__) || \
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defined(_POWER) || defined(_ARCH_PPC)) && defined(__GNUC__)
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const size_t LineSize = 32;
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const size_t LineSize = 32;
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const intptr_t Mask = ~(LineSize - 1);
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const intptr_t Mask = ~(LineSize - 1);
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@@ -57,6 +60,12 @@ void llvm::sys::Memory::InvalidateInstructionCache(const void *Addr,
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for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
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for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
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asm volatile("icbi 0, %0" : : "r"(Line));
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asm volatile("icbi 0, %0" : : "r"(Line));
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asm volatile("isync");
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asm volatile("isync");
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#endif
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# elif defined(__arm__) && defined(__GNUC__)
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// FIXME: Can we safely always call this for __GNUC__ everywhere?
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char *Start = (char*) Addr;
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char *End = Start + Len;
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__clear_cache(Start, End);
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# endif
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#endif // end apple
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#endif // end apple
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}
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}
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