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Make psuedo FEXT_T8I816_ins into a custom emitter.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176002 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reed Kotler
2013-02-24 23:17:51 +00:00
parent 4edd84da1b
commit 29cb2591f9
5 changed files with 39 additions and 61 deletions
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53
lib/Target/Mips/Mips16InstrInfo.cpp
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@@ -135,30 +135,6 @@ bool Mips16InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
switch(MI->getDesc().getOpcode()) {
default:
return false;
case Mips::BteqzT8CmpiX16:
ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16,
Mips::CmpiRxImm16, Mips::CmpiRxImmX16);
break;
case Mips::BteqzT8SltiX16:
ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16,
Mips::SltiRxImm16, Mips::SltiRxImmX16);
break;
case Mips::BteqzT8SltiuX16:
ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BteqzX16,
Mips::SltiuRxImm16, Mips::SltiuRxImmX16);
break;
case Mips::BtnezT8CmpiX16:
ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16,
Mips::CmpiRxImm16, Mips::CmpiRxImmX16);
break;
case Mips::BtnezT8SltiX16:
ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16,
Mips::SltiRxImm16, Mips::SltiRxImmX16);
break;
case Mips::BtnezT8SltiuX16:
ExpandFEXT_T8I8I16_ins(MBB, MI, Mips::BtnezX16,
Mips::SltiuRxImm16, Mips::SltiuRxImmX16);
break;
case Mips::RetRA16:
ExpandRetRA16(MBB, MI, Mips::JrcRa16);
break;
@@ -435,35 +411,6 @@ void Mips16InstrInfo::ExpandRetRA16(MachineBasicBlock &MBB,
BuildMI(MBB, I, I->getDebugLoc(), get(Opc));
}
void Mips16InstrInfo::ExpandFEXT_T8I816_ins(
MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned BtOpc, unsigned CmpOpc) const {
unsigned regX = I->getOperand(0).getReg();
unsigned regY = I->getOperand(1).getReg();
MachineBasicBlock *target = I->getOperand(2).getMBB();
BuildMI(MBB, I, I->getDebugLoc(), get(CmpOpc)).addReg(regX).addReg(regY);
BuildMI(MBB, I, I->getDebugLoc(), get(BtOpc)).addMBB(target);
}
void Mips16InstrInfo::ExpandFEXT_T8I8I16_ins(
MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc) const {
unsigned regX = I->getOperand(0).getReg();
int64_t imm = I->getOperand(1).getImm();
MachineBasicBlock *target = I->getOperand(2).getMBB();
unsigned CmpOpc;
if (isUInt<8>(imm))
CmpOpc = CmpiOpc;
else if (isUInt<16>(imm))
CmpOpc = CmpiXOpc;
else
llvm_unreachable("immediate field not usable");
BuildMI(MBB, I, I->getDebugLoc(), get(CmpOpc)).addReg(regX).addImm(imm);
BuildMI(MBB, I, I->getDebugLoc(), get(BtOpc)).addMBB(target);
}
void Mips16InstrInfo::ExpandFEXT_CCRX16_ins(
MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
unsigned SltOpc) const {