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ARM: remove invalid invalid tests

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The tests were checking for barriers which the ARM ARM says they must execute
as a full system DMB/DSB, rather than that they're UNDEFINED and LLVM does in
fact represent them.

The tests happened to be passing because they were using a non-versioned ARM
triple which didn't have *any* DMB/DSB instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186662 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tim Northover 2013-07-19 10:19:56 +00:00
parent 38c6ff6c11
commit 29cc13892d
2 changed files with 0 additions and 32 deletions
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16
test/MC/Disassembler/ARM/invalid-DMB-thumb.txt
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@ -1,16 +0,0 @@
# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 2>&1 | grep "invalid instruction encoding"
# Opcode=1908 Name=t2DMB Format=ARM_FORMAT_THUMBFRM(25)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 1| 0: 0: 1: 1| 1: 0: 1: 1| 1: 1: 1: 1| 1: 0: 0: 0| 1: 1: 1: 1| 0: 1: 0: 1| 0: 0: 0: 1|
# -------------------------------------------------------------------------------------------------
#
# Inst{3-0} encodes the option: SY, ST, ISH, ISHST, NSH, NSHST, OSH, OSHST.
# Reject invalid encodings.
#
# See also A8.6.42 DSB
# All other encodings of option are reserved. It is IMPLEMENTATION DEFINED whether options
# other than SY are implemented. All unsupported and reserved options must execute as a full
# system DSB operation, but software must not rely on this behavior.
0xbf 0xf3 0x51 0x8f

16
test/MC/Disassembler/ARM/invalid-DSB-arm.txt
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@ -1,16 +0,0 @@
# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 2>&1 | grep "invalid instruction encoding"
# Opcode=102 Name=DSB Format=ARM_FORMAT_MISCFRM(26)
# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
# -------------------------------------------------------------------------------------------------
# | 1: 1: 1: 1| 0: 1: 0: 1| 0: 1: 1: 1| 1: 1: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 0: 0| 0: 0: 0: 0|
# -------------------------------------------------------------------------------------------------
#
# Inst{3-0} encodes the option: SY, ST, ISH, ISHST, NSH, NSHST, OSH, OSHST.
# Reject invalid encodings.
#
# See also A8.6.42 DSB
# All other encodings of option are reserved. It is IMPLEMENTATION DEFINED whether options
# other than SY are implemented. All unsupported and reserved options must execute as a full
# system DSB operation, but software must not rely on this behavior.
0x40 0xf0 0x7f 0xf5