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Move stack slot assignments into LiveRangeEdit.

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All registers created during splitting or spilling are assigned to the same
stack slot as the parent register.

When splitting or rematting, we may not spill at all. In that case the stack
slot is still assigned, but it will be dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116546 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-10-15 00:16:55 +00:00
parent a17768f582
commit 2a0180fbff
4 changed files with 16 additions and 10 deletions
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4
lib/CodeGen/InlineSpiller.cpp
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@ -371,9 +371,7 @@ void InlineSpiller::spill(LiveRangeEdit &edit) {
return; return;
rc_ = mri_.getRegClass(edit.getReg()); rc_ = mri_.getRegClass(edit.getReg());
stackSlot_ = vrm_.getStackSlot(edit.getReg()); stackSlot_ = edit.assignStackSlot(vrm_);
if (stackSlot_ == VirtRegMap::NO_STACK_SLOT)
stackSlot_ = vrm_.assignVirt2StackSlot(edit.getReg());
// Iterate over instructions using register. // Iterate over instructions using register.
for (MachineRegisterInfo::reg_iterator RI = mri_.reg_begin(edit.getReg()); for (MachineRegisterInfo::reg_iterator RI = mri_.reg_begin(edit.getReg());

9
lib/CodeGen/LiveRangeEdit.cpp
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@ -18,12 +18,21 @@
using namespace llvm; using namespace llvm;
int LiveRangeEdit::assignStackSlot(VirtRegMap &vrm) {
int ss = vrm.getStackSlot(getReg());
if (ss != VirtRegMap::NO_STACK_SLOT)
return ss;
return vrm.assignVirt2StackSlot(getReg());
}
LiveInterval &LiveRangeEdit::create(MachineRegisterInfo &mri, LiveInterval &LiveRangeEdit::create(MachineRegisterInfo &mri,
LiveIntervals &lis, LiveIntervals &lis,
VirtRegMap &vrm) { VirtRegMap &vrm) {
const TargetRegisterClass *RC = mri.getRegClass(parent_.reg); const TargetRegisterClass *RC = mri.getRegClass(parent_.reg);
unsigned VReg = mri.createVirtualRegister(RC); unsigned VReg = mri.createVirtualRegister(RC);
vrm.grow(); vrm.grow();
// Immediately assign to the same stack slot as parent.
vrm.assignVirt2StackSlot(VReg, assignStackSlot(vrm));
LiveInterval &li = lis.getOrCreateInterval(VReg); LiveInterval &li = lis.getOrCreateInterval(VReg);
newRegs_.push_back(&li); newRegs_.push_back(&li);
return li; return li;

7
lib/CodeGen/LiveRangeEdit.h
View File

@ -55,7 +55,12 @@ public:
iterator begin() const { return newRegs_.begin()+firstNew_; } iterator begin() const { return newRegs_.begin()+firstNew_; }
iterator end() const { return newRegs_.end(); } iterator end() const { return newRegs_.end(); }
/// create - Create a new register with the same class as parentReg_. /// assignStackSlot - Ensure a stack slot is assigned to parent.
/// @return the assigned stack slot number.
int assignStackSlot(VirtRegMap&);
/// create - Create a new register with the same class and stack slot as
/// parent.
LiveInterval &create(MachineRegisterInfo&, LiveIntervals&, VirtRegMap&); LiveInterval &create(MachineRegisterInfo&, LiveIntervals&, VirtRegMap&);
/// allUsesAvailableAt - Return true if all registers used by OrigMI at /// allUsesAvailableAt - Return true if all registers used by OrigMI at

6
lib/CodeGen/SplitKit.cpp
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@ -591,12 +591,6 @@ SplitEditor::SplitEditor(SplitAnalysis &sa, LiveIntervals &lis, VirtRegMap &vrm,
openli_(lis_, *curli_) openli_(lis_, *curli_)
{ {
assert(curli_ && "SplitEditor created from empty SplitAnalysis"); assert(curli_ && "SplitEditor created from empty SplitAnalysis");
// Make sure curli_ is assigned a stack slot, so all our intervals get the
// same slot as curli_.
if (vrm_.getStackSlot(curli_->reg) == VirtRegMap::NO_STACK_SLOT)
vrm_.assignVirt2StackSlot(curli_->reg);
} }
bool SplitEditor::intervalsLiveAt(SlotIndex Idx) const { bool SplitEditor::intervalsLiveAt(SlotIndex Idx) const {