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Use XOP vpcom intrinsics in patterns instead of a target specific SDNode type. Remove the custom lowering code that selected the SDNode type.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158279 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-06-09 17:02:24 +00:00
parent c29106b36f
commit 2a5dc43bd9
4 changed files with 13 additions and 60 deletions
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36
lib/Target/X86/X86ISelLowering.cpp
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@ -9534,42 +9534,6 @@ X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const
DAG.getConstant(X86CC, MVT::i8), Cond);
return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);
}
// XOP comparison intrinsics
case Intrinsic::x86_xop_vpcomb:
case Intrinsic::x86_xop_vpcomw:
case Intrinsic::x86_xop_vpcomd:
case Intrinsic::x86_xop_vpcomq:
case Intrinsic::x86_xop_vpcomub:
case Intrinsic::x86_xop_vpcomuw:
case Intrinsic::x86_xop_vpcomud:
case Intrinsic::x86_xop_vpcomuq: {
unsigned CC;
unsigned Opc;
switch (IntNo) {
default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.
case Intrinsic::x86_xop_vpcomb:
case Intrinsic::x86_xop_vpcomw:
case Intrinsic::x86_xop_vpcomd:
case Intrinsic::x86_xop_vpcomq:
CC = 0;
Opc = X86ISD::VPCOM;
break;
case Intrinsic::x86_xop_vpcomub:
case Intrinsic::x86_xop_vpcomuw:
case Intrinsic::x86_xop_vpcomud:
case Intrinsic::x86_xop_vpcomuq:
CC = 0;
Opc = X86ISD::VPCOMU;
break;
}
SDValue LHS = Op.getOperand(1);
SDValue RHS = Op.getOperand(2);
SDValue Imm = Op.getOperand(3);
return DAG.getNode(Opc, dl, Op.getValueType(), LHS, RHS, Imm);
}
// Arithmetic intrinsics.
case Intrinsic::x86_sse2_pmulu_dq:
case Intrinsic::x86_avx2_pmulu_dq:

3
lib/Target/X86/X86ISelLowering.h
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@ -246,9 +246,6 @@ namespace llvm {
// PCMP* - Vector integer comparisons.
PCMPEQ, PCMPGT,
// VPCOM, VPCOMU - XOP Vector integer comparisons.
VPCOM, VPCOMU,
// ADD, SUB, SMUL, etc. - Arithmetic operations with FLAGS results.
ADD, SUB, ADC, SBB, SMUL,
INC, DEC, OR, XOR, AND,

7
lib/Target/X86/X86InstrFragmentsSIMD.td
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@ -107,13 +107,6 @@ def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
def X86vpcom : SDNode<"X86ISD::VPCOM",
SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
SDTCisSameAs<0,2>, SDTCisVT<3, i8>]>>;
def X86vpcomu : SDNode<"X86ISD::VPCOMU",
SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
SDTCisSameAs<0,2>, SDTCisVT<3, i8>]>>;
def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
SDTCisSameAs<1,2>]>>;

27
lib/Target/X86/X86InstrXOP.td
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@ -170,32 +170,31 @@ let isAsmParserOnly = 1 in {
}
// Instruction where second source can be memory, third must be imm8
multiclass xop4opimm<bits<8> opc, string OpcodeStr, SDNode OpNode,
ValueType VT> {
multiclass xop4opimm<bits<8> opc, string OpcodeStr, Intrinsic Int> {
def ri : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
(ins VR128:$src1, VR128:$src2, i8imm:$src3),
!strconcat(OpcodeStr,
"\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
[(set VR128:$dst,
(VT (OpNode VR128:$src1, VR128:$src2, imm:$src3)))]>, VEX_4V;
[(set VR128:$dst, (Int VR128:$src1, VR128:$src2, imm:$src3))]>,
VEX_4V;
def mi : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
(ins VR128:$src1, f128mem:$src2, i8imm:$src3),
!strconcat(OpcodeStr,
"\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
[(set VR128:$dst,
(VT (OpNode VR128:$src1, (bitconvert (memopv2i64 addr:$src2)),
imm:$src3)))]>, VEX_4V;
(Int VR128:$src1, (bitconvert (memopv2i64 addr:$src2)),
imm:$src3))]>, VEX_4V;
}
let isAsmParserOnly = 1 in {
defm VPCOMB : xop4opimm<0xCC, "vpcomb", X86vpcom, v16i8>;
defm VPCOMW : xop4opimm<0xCD, "vpcomw", X86vpcom, v8i16>;
defm VPCOMD : xop4opimm<0xCE, "vpcomd", X86vpcom, v4i32>;
defm VPCOMQ : xop4opimm<0xCF, "vpcomq", X86vpcom, v2i64>;
defm VPCOMUB : xop4opimm<0xEC, "vpcomub", X86vpcomu, v16i8>;
defm VPCOMUW : xop4opimm<0xED, "vpcomuw", X86vpcomu, v8i16>;
defm VPCOMUD : xop4opimm<0xEE, "vpcomud", X86vpcomu, v4i32>;
defm VPCOMUQ : xop4opimm<0xEF, "vpcomuq", X86vpcomu, v2i64>;
defm VPCOMB : xop4opimm<0xCC, "vpcomb", int_x86_xop_vpcomb>;
defm VPCOMW : xop4opimm<0xCD, "vpcomw", int_x86_xop_vpcomw>;
defm VPCOMD : xop4opimm<0xCE, "vpcomd", int_x86_xop_vpcomd>;
defm VPCOMQ : xop4opimm<0xCF, "vpcomq", int_x86_xop_vpcomq>;
defm VPCOMUB : xop4opimm<0xEC, "vpcomub", int_x86_xop_vpcomub>;
defm VPCOMUW : xop4opimm<0xED, "vpcomuw", int_x86_xop_vpcomuw>;
defm VPCOMUD : xop4opimm<0xEE, "vpcomud", int_x86_xop_vpcomud>;
defm VPCOMUQ : xop4opimm<0xEF, "vpcomuq", int_x86_xop_vpcomuq>;
}
// Instruction where either second or third source can be memory