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Expose the instruction contraint string as an argument to the NLdSt class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80011 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1212,8 +1212,8 @@ class NI4<dag oops, dag iops, InstrItinClass itin, string asm, list<dag> pattern
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}
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class NLdSt<dag oops, dag iops, InstrItinClass itin,
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string asm, list<dag> pattern>
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: NeonI<oops, iops, AddrMode6, IndexModeNone, itin, asm, "", pattern> {
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string asm, string cstr, list<dag> pattern>
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: NeonI<oops, iops, AddrMode6, IndexModeNone, itin, asm, cstr, pattern> {
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let Inst{31-24} = 0b11110100;
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}
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@ -183,14 +183,12 @@ def VSTRQ : NI4<(outs), (ins QPR:$src, addrmode4:$addr),
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// VLD1 : Vector Load (multiple single elements)
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class VLD1D<string OpcodeStr, ValueType Ty, Intrinsic IntOp>
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: NLdSt<(outs DPR:$dst), (ins addrmode6:$addr),
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NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$dst\\}, $addr"),
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: NLdSt<(outs DPR:$dst), (ins addrmode6:$addr), NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$dst\\}, $addr"), "",
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[(set DPR:$dst, (Ty (IntOp addrmode6:$addr)))]>;
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class VLD1Q<string OpcodeStr, ValueType Ty, Intrinsic IntOp>
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: NLdSt<(outs QPR:$dst), (ins addrmode6:$addr),
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NoItinerary,
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!strconcat(OpcodeStr, "\t${dst:dregpair}, $addr"),
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: NLdSt<(outs QPR:$dst), (ins addrmode6:$addr), NoItinerary,
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!strconcat(OpcodeStr, "\t${dst:dregpair}, $addr"), "",
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[(set QPR:$dst, (Ty (IntOp addrmode6:$addr)))]>;
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def VLD1d8 : VLD1D<"vld1.8", v8i8, int_arm_neon_vld1>;
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@ -209,9 +207,8 @@ let mayLoad = 1 in {
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// VLD2 : Vector Load (multiple 2-element structures)
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class VLD2D<string OpcodeStr>
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: NLdSt<(outs DPR:$dst1, DPR:$dst2), (ins addrmode6:$addr),
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NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$dst1,$dst2\\}, $addr"), []>;
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: NLdSt<(outs DPR:$dst1, DPR:$dst2), (ins addrmode6:$addr), NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$dst1,$dst2\\}, $addr"), "", []>;
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def VLD2d8 : VLD2D<"vld2.8">;
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def VLD2d16 : VLD2D<"vld2.16">;
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@ -221,7 +218,7 @@ def VLD2d32 : VLD2D<"vld2.32">;
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class VLD3D<string OpcodeStr>
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: NLdSt<(outs DPR:$dst1, DPR:$dst2, DPR:$dst3), (ins addrmode6:$addr),
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NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$dst1,$dst2,$dst3\\}, $addr"), []>;
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!strconcat(OpcodeStr, "\t\\{$dst1,$dst2,$dst3\\}, $addr"), "", []>;
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def VLD3d8 : VLD3D<"vld3.8">;
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def VLD3d16 : VLD3D<"vld3.16">;
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@ -230,9 +227,9 @@ def VLD3d32 : VLD3D<"vld3.32">;
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// VLD4 : Vector Load (multiple 4-element structures)
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class VLD4D<string OpcodeStr>
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: NLdSt<(outs DPR:$dst1, DPR:$dst2, DPR:$dst3, DPR:$dst4),
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(ins addrmode6:$addr),
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NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$dst1,$dst2,$dst3,$dst4\\}, $addr"), []>;
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(ins addrmode6:$addr), NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$dst1,$dst2,$dst3,$dst4\\}, $addr"),
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"", []>;
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def VLD4d8 : VLD4D<"vld4.8">;
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def VLD4d16 : VLD4D<"vld4.16">;
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@ -241,14 +238,12 @@ def VLD4d32 : VLD4D<"vld4.32">;
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// VST1 : Vector Store (multiple single elements)
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class VST1D<string OpcodeStr, ValueType Ty, Intrinsic IntOp>
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: NLdSt<(outs), (ins addrmode6:$addr, DPR:$src),
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NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$src\\}, $addr"),
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: NLdSt<(outs), (ins addrmode6:$addr, DPR:$src), NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$src\\}, $addr"), "",
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[(IntOp addrmode6:$addr, (Ty DPR:$src))]>;
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class VST1Q<string OpcodeStr, ValueType Ty, Intrinsic IntOp>
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: NLdSt<(outs), (ins addrmode6:$addr, QPR:$src),
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NoItinerary,
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!strconcat(OpcodeStr, "\t${src:dregpair}, $addr"),
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: NLdSt<(outs), (ins addrmode6:$addr, QPR:$src), NoItinerary,
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!strconcat(OpcodeStr, "\t${src:dregpair}, $addr"), "",
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[(IntOp addrmode6:$addr, (Ty QPR:$src))]>;
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def VST1d8 : VST1D<"vst1.8", v8i8, int_arm_neon_vst1>;
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@ -268,7 +263,7 @@ let mayStore = 1 in {
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// VST2 : Vector Store (multiple 2-element structures)
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class VST2D<string OpcodeStr>
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: NLdSt<(outs), (ins addrmode6:$addr, DPR:$src1, DPR:$src2), NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$src1,$src2\\}, $addr"), []>;
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!strconcat(OpcodeStr, "\t\\{$src1,$src2\\}, $addr"), "", []>;
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def VST2d8 : VST2D<"vst2.8">;
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def VST2d16 : VST2D<"vst2.16">;
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@ -278,7 +273,7 @@ def VST2d32 : VST2D<"vst2.32">;
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class VST3D<string OpcodeStr>
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: NLdSt<(outs), (ins addrmode6:$addr, DPR:$src1, DPR:$src2, DPR:$src3),
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NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$src1,$src2,$src3\\}, $addr"), []>;
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!strconcat(OpcodeStr, "\t\\{$src1,$src2,$src3\\}, $addr"), "", []>;
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def VST3d8 : VST3D<"vst3.8">;
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def VST3d16 : VST3D<"vst3.16">;
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@ -288,7 +283,8 @@ def VST3d32 : VST3D<"vst3.32">;
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class VST4D<string OpcodeStr>
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: NLdSt<(outs), (ins addrmode6:$addr,
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DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4), NoItinerary,
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!strconcat(OpcodeStr, "\t\\{$src1,$src2,$src3,$src4\\}, $addr"), []>;
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!strconcat(OpcodeStr, "\t\\{$src1,$src2,$src3,$src4\\}, $addr"),
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"", []>;
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def VST4d8 : VST4D<"vst4.8">;
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def VST4d16 : VST4D<"vst4.16">;
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