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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-19 19:29:31 +00:00
Fix bug in copying long constants to register pairs. We were getting
the top and bottom halves backwards...how embarrassing. Support 'cast long to long' and other similar no-op casts to long. Support 'ret long'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14683 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -232,8 +232,8 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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// Copy the value into the register pair.
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// R = top(more-significant) half, R+1 = bottom(less-significant) half
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uint64_t Val = cast<ConstantInt>(C)->getRawValue();
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unsigned topHalf = Val & 0xffffffffU;
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unsigned bottomHalf = Val >> 32;
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unsigned bottomHalf = Val & 0xffffffffU;
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unsigned topHalf = Val >> 32;
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unsigned HH = topHalf >> 10;
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unsigned HM = topHalf & 0x03ff;
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unsigned LM = bottomHalf >> 10;
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@ -565,6 +565,17 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
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break;
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}
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}
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} else if (newTyClass == cLong) {
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if (oldTyClass == cLong) {
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// Just copy it
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BuildMI (*BB, IP, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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BuildMI (*BB, IP, V8::ORrr, 2, DestReg+1).addReg (V8::G0)
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.addReg (SrcReg+1);
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} else {
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std::cerr << "Cast still unsupported: SrcTy = "
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<< *SrcTy << ", DestTy = " << *DestTy << "\n";
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abort ();
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}
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} else {
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std::cerr << "Cast still unsupported: SrcTy = "
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<< *SrcTy << ", DestTy = " << *DestTy << "\n";
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@ -705,6 +716,10 @@ void V8ISel::visitReturnInst(ReturnInst &I) {
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case cFloat:
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BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
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break;
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case cLong:
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BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
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BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
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break;
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default:
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std::cerr << "Return instruction of this type not handled: " << I;
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abort ();
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@ -232,8 +232,8 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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// Copy the value into the register pair.
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// R = top(more-significant) half, R+1 = bottom(less-significant) half
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uint64_t Val = cast<ConstantInt>(C)->getRawValue();
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unsigned topHalf = Val & 0xffffffffU;
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unsigned bottomHalf = Val >> 32;
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unsigned bottomHalf = Val & 0xffffffffU;
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unsigned topHalf = Val >> 32;
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unsigned HH = topHalf >> 10;
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unsigned HM = topHalf & 0x03ff;
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unsigned LM = bottomHalf >> 10;
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@ -565,6 +565,17 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
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break;
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}
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}
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} else if (newTyClass == cLong) {
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if (oldTyClass == cLong) {
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// Just copy it
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BuildMI (*BB, IP, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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BuildMI (*BB, IP, V8::ORrr, 2, DestReg+1).addReg (V8::G0)
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.addReg (SrcReg+1);
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} else {
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std::cerr << "Cast still unsupported: SrcTy = "
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<< *SrcTy << ", DestTy = " << *DestTy << "\n";
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abort ();
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}
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} else {
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std::cerr << "Cast still unsupported: SrcTy = "
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<< *SrcTy << ", DestTy = " << *DestTy << "\n";
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@ -705,6 +716,10 @@ void V8ISel::visitReturnInst(ReturnInst &I) {
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case cFloat:
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BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
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break;
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case cLong:
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BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
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BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
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break;
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default:
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std::cerr << "Return instruction of this type not handled: " << I;
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abort ();
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@ -232,8 +232,8 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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// Copy the value into the register pair.
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// R = top(more-significant) half, R+1 = bottom(less-significant) half
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uint64_t Val = cast<ConstantInt>(C)->getRawValue();
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unsigned topHalf = Val & 0xffffffffU;
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unsigned bottomHalf = Val >> 32;
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unsigned bottomHalf = Val & 0xffffffffU;
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unsigned topHalf = Val >> 32;
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unsigned HH = topHalf >> 10;
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unsigned HM = topHalf & 0x03ff;
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unsigned LM = bottomHalf >> 10;
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@ -565,6 +565,17 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
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break;
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}
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}
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} else if (newTyClass == cLong) {
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if (oldTyClass == cLong) {
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// Just copy it
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BuildMI (*BB, IP, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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BuildMI (*BB, IP, V8::ORrr, 2, DestReg+1).addReg (V8::G0)
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.addReg (SrcReg+1);
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} else {
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std::cerr << "Cast still unsupported: SrcTy = "
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<< *SrcTy << ", DestTy = " << *DestTy << "\n";
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abort ();
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}
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} else {
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std::cerr << "Cast still unsupported: SrcTy = "
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<< *SrcTy << ", DestTy = " << *DestTy << "\n";
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@ -705,6 +716,10 @@ void V8ISel::visitReturnInst(ReturnInst &I) {
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case cFloat:
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BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
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break;
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case cLong:
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BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
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BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
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break;
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default:
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std::cerr << "Return instruction of this type not handled: " << I;
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abort ();
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@ -232,8 +232,8 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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// Copy the value into the register pair.
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// R = top(more-significant) half, R+1 = bottom(less-significant) half
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uint64_t Val = cast<ConstantInt>(C)->getRawValue();
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unsigned topHalf = Val & 0xffffffffU;
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unsigned bottomHalf = Val >> 32;
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unsigned bottomHalf = Val & 0xffffffffU;
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unsigned topHalf = Val >> 32;
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unsigned HH = topHalf >> 10;
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unsigned HM = topHalf & 0x03ff;
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unsigned LM = bottomHalf >> 10;
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@ -565,6 +565,17 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
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break;
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}
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}
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} else if (newTyClass == cLong) {
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if (oldTyClass == cLong) {
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// Just copy it
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BuildMI (*BB, IP, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
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BuildMI (*BB, IP, V8::ORrr, 2, DestReg+1).addReg (V8::G0)
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.addReg (SrcReg+1);
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} else {
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std::cerr << "Cast still unsupported: SrcTy = "
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<< *SrcTy << ", DestTy = " << *DestTy << "\n";
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abort ();
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}
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} else {
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std::cerr << "Cast still unsupported: SrcTy = "
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<< *SrcTy << ", DestTy = " << *DestTy << "\n";
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@ -705,6 +716,10 @@ void V8ISel::visitReturnInst(ReturnInst &I) {
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case cFloat:
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BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
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break;
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case cLong:
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BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
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BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
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break;
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default:
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std::cerr << "Return instruction of this type not handled: " << I;
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abort ();
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