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Fix bug in copying long constants to register pairs. We were getting

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the top and bottom halves backwards...how embarrassing.
Support 'cast long to long' and other similar no-op casts to long.
Support 'ret long'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14683 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Brian Gaeke 2004-07-08 07:52:13 +00:00
parent 5ace1e4f6f
commit 2a9f539168
4 changed files with 68 additions and 8 deletions
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19
lib/Target/Sparc/InstSelectSimple.cpp
View File

@ -232,8 +232,8 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
// Copy the value into the register pair.
// R = top(more-significant) half, R+1 = bottom(less-significant) half
uint64_t Val = cast<ConstantInt>(C)->getRawValue();
unsigned topHalf = Val & 0xffffffffU;
unsigned bottomHalf = Val >> 32;
unsigned bottomHalf = Val & 0xffffffffU;
unsigned topHalf = Val >> 32;
unsigned HH = topHalf >> 10;
unsigned HM = topHalf & 0x03ff;
unsigned LM = bottomHalf >> 10;
@ -565,6 +565,17 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
break;
}
}
} else if (newTyClass == cLong) {
if (oldTyClass == cLong) {
// Just copy it
BuildMI (*BB, IP, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
BuildMI (*BB, IP, V8::ORrr, 2, DestReg+1).addReg (V8::G0)
.addReg (SrcReg+1);
} else {
std::cerr << "Cast still unsupported: SrcTy = "
<< *SrcTy << ", DestTy = " << *DestTy << "\n";
abort ();
}
} else {
std::cerr << "Cast still unsupported: SrcTy = "
<< *SrcTy << ", DestTy = " << *DestTy << "\n";
@ -705,6 +716,10 @@ void V8ISel::visitReturnInst(ReturnInst &I) {
case cFloat:
BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
break;
case cLong:
BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
break;
default:
std::cerr << "Return instruction of this type not handled: " << I;
abort ();

19
lib/Target/Sparc/SparcV8ISelSimple.cpp
View File

@ -232,8 +232,8 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
// Copy the value into the register pair.
// R = top(more-significant) half, R+1 = bottom(less-significant) half
uint64_t Val = cast<ConstantInt>(C)->getRawValue();
unsigned topHalf = Val & 0xffffffffU;
unsigned bottomHalf = Val >> 32;
unsigned bottomHalf = Val & 0xffffffffU;
unsigned topHalf = Val >> 32;
unsigned HH = topHalf >> 10;
unsigned HM = topHalf & 0x03ff;
unsigned LM = bottomHalf >> 10;
@ -565,6 +565,17 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
break;
}
}
} else if (newTyClass == cLong) {
if (oldTyClass == cLong) {
// Just copy it
BuildMI (*BB, IP, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
BuildMI (*BB, IP, V8::ORrr, 2, DestReg+1).addReg (V8::G0)
.addReg (SrcReg+1);
} else {
std::cerr << "Cast still unsupported: SrcTy = "
<< *SrcTy << ", DestTy = " << *DestTy << "\n";
abort ();
}
} else {
std::cerr << "Cast still unsupported: SrcTy = "
<< *SrcTy << ", DestTy = " << *DestTy << "\n";
@ -705,6 +716,10 @@ void V8ISel::visitReturnInst(ReturnInst &I) {
case cFloat:
BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
break;
case cLong:
BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
break;
default:
std::cerr << "Return instruction of this type not handled: " << I;
abort ();

19
lib/Target/SparcV8/InstSelectSimple.cpp
View File

@ -232,8 +232,8 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
// Copy the value into the register pair.
// R = top(more-significant) half, R+1 = bottom(less-significant) half
uint64_t Val = cast<ConstantInt>(C)->getRawValue();
unsigned topHalf = Val & 0xffffffffU;
unsigned bottomHalf = Val >> 32;
unsigned bottomHalf = Val & 0xffffffffU;
unsigned topHalf = Val >> 32;
unsigned HH = topHalf >> 10;
unsigned HM = topHalf & 0x03ff;
unsigned LM = bottomHalf >> 10;
@ -565,6 +565,17 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
break;
}
}
} else if (newTyClass == cLong) {
if (oldTyClass == cLong) {
// Just copy it
BuildMI (*BB, IP, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
BuildMI (*BB, IP, V8::ORrr, 2, DestReg+1).addReg (V8::G0)
.addReg (SrcReg+1);
} else {
std::cerr << "Cast still unsupported: SrcTy = "
<< *SrcTy << ", DestTy = " << *DestTy << "\n";
abort ();
}
} else {
std::cerr << "Cast still unsupported: SrcTy = "
<< *SrcTy << ", DestTy = " << *DestTy << "\n";
@ -705,6 +716,10 @@ void V8ISel::visitReturnInst(ReturnInst &I) {
case cFloat:
BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
break;
case cLong:
BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
break;
default:
std::cerr << "Return instruction of this type not handled: " << I;
abort ();

19
lib/Target/SparcV8/SparcV8ISelSimple.cpp
View File

@ -232,8 +232,8 @@ void V8ISel::copyConstantToRegister(MachineBasicBlock *MBB,
// Copy the value into the register pair.
// R = top(more-significant) half, R+1 = bottom(less-significant) half
uint64_t Val = cast<ConstantInt>(C)->getRawValue();
unsigned topHalf = Val & 0xffffffffU;
unsigned bottomHalf = Val >> 32;
unsigned bottomHalf = Val & 0xffffffffU;
unsigned topHalf = Val >> 32;
unsigned HH = topHalf >> 10;
unsigned HM = topHalf & 0x03ff;
unsigned LM = bottomHalf >> 10;
@ -565,6 +565,17 @@ void V8ISel::emitCastOperation(MachineBasicBlock *BB,
break;
}
}
} else if (newTyClass == cLong) {
if (oldTyClass == cLong) {
// Just copy it
BuildMI (*BB, IP, V8::ORrr, 2, DestReg).addReg (V8::G0).addReg (SrcReg);
BuildMI (*BB, IP, V8::ORrr, 2, DestReg+1).addReg (V8::G0)
.addReg (SrcReg+1);
} else {
std::cerr << "Cast still unsupported: SrcTy = "
<< *SrcTy << ", DestTy = " << *DestTy << "\n";
abort ();
}
} else {
std::cerr << "Cast still unsupported: SrcTy = "
<< *SrcTy << ", DestTy = " << *DestTy << "\n";
@ -705,6 +716,10 @@ void V8ISel::visitReturnInst(ReturnInst &I) {
case cFloat:
BuildMI (BB, V8::FMOVS, 2, V8::F0).addReg(RetValReg);
break;
case cLong:
BuildMI (BB, V8::ORrr, 2, V8::I0).addReg(V8::G0).addReg(RetValReg);
BuildMI (BB, V8::ORrr, 2, V8::I1).addReg(V8::G0).addReg(RetValReg+1);
break;
default:
std::cerr << "Return instruction of this type not handled: " << I;
abort ();