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misched: Release bottom roots in reverse order.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157426 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick
2012-05-24 22:11:05 +00:00
parent 8c2d9212a9
commit 2aa689dfbf
1 changed files with 23 additions and 9 deletions
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32
lib/CodeGen/MachineScheduler.cpp
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@@ -396,6 +396,8 @@ protected:
void moveInstruction(MachineInstr *MI, MachineBasicBlock::iterator InsertPos); void moveInstruction(MachineInstr *MI, MachineBasicBlock::iterator InsertPos);
bool checkSchedLimit(); bool checkSchedLimit();
void releaseRoots();
void releaseSucc(SUnit *SU, SDep *SuccEdge); void releaseSucc(SUnit *SU, SDep *SuccEdge);
void releaseSuccessors(SUnit *SU); void releaseSuccessors(SUnit *SU);
void releasePred(SUnit *SU, SDep *PredEdge); void releasePred(SUnit *SU, SDep *PredEdge);
@@ -554,6 +556,26 @@ updateScheduledPressure(std::vector<unsigned> NewMaxPressure) {
} }
} }
// Release all DAG roots for scheduling.
void ScheduleDAGMI::releaseRoots() {
SmallVector<SUnit*, 16> BotRoots;
for (std::vector<SUnit>::iterator
I = SUnits.begin(), E = SUnits.end(); I != E; ++I) {
// A SUnit is ready to top schedule if it has no predecessors.
if (I->Preds.empty())
SchedImpl->releaseTopNode(&(*I));
// A SUnit is ready to bottom schedule if it has no successors.
if (I->Succs.empty())
BotRoots.push_back(&(*I));
}
// Release bottom roots in reverse order so the higher priority nodes appear
// first. This is more natural and slightly more efficient.
for (SmallVectorImpl<SUnit*>::const_reverse_iterator
I = BotRoots.rbegin(), E = BotRoots.rend(); I != E; ++I)
SchedImpl->releaseBottomNode(*I);
}
/// schedule - Called back from MachineScheduler::runOnMachineFunction /// schedule - Called back from MachineScheduler::runOnMachineFunction
/// after setting up the current scheduling region. [RegionBegin, RegionEnd) /// after setting up the current scheduling region. [RegionBegin, RegionEnd)
/// only includes instructions that have DAG nodes, not scheduling boundaries. /// only includes instructions that have DAG nodes, not scheduling boundaries.
@@ -584,15 +606,7 @@ void ScheduleDAGMI::schedule() {
releasePredecessors(&ExitSU); releasePredecessors(&ExitSU);
// Release all DAG roots for scheduling. // Release all DAG roots for scheduling.
for (std::vector<SUnit>::iterator I = SUnits.begin(), E = SUnits.end(); releaseRoots();
I != E; ++I) {
// A SUnit is ready to top schedule if it has no predecessors.
if (I->Preds.empty())
SchedImpl->releaseTopNode(&(*I));
// A SUnit is ready to bottom schedule if it has no successors.
if (I->Succs.empty())
SchedImpl->releaseBottomNode(&(*I));
}
CurrentTop = nextIfDebug(RegionBegin, RegionEnd); CurrentTop = nextIfDebug(RegionBegin, RegionEnd);
CurrentBottom = RegionEnd; CurrentBottom = RegionEnd;