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Add support for targets (like Alpha) that have terminator instructions which
use virtual registers. We now allow the first instruction in a block of terminators to use virtual registers, and update phi elimination to correctly update livevar when eliminating phi's. This fixes a problem on a testcase Andrew sent me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25083 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -98,6 +98,17 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) {
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return true;
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}
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/// InstructionUsesRegister - Return true if the specified machine instr has a
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/// use of the specified register.
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static bool InstructionUsesRegister(MachineInstr *MI, unsigned SrcReg) {
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
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if (MI->getOperand(0).isRegister() &&
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MI->getOperand(0).getReg() == SrcReg &&
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MI->getOperand(0).isUse())
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return true;
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return false;
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}
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/// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
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/// under the assuption that it needs to be lowered in a way that supports
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/// atomic execution of PHIs. This lowering method is always correct all of the
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@ -262,12 +273,37 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
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}
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// Okay, if we now know that the value is not live out of the block,
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// we can add a kill marker to the copy we inserted saying that it
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// kills the incoming value!
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//
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// we can add a kill marker in this block saying that it kills the incoming
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// value!
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if (!ValueIsLive) {
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MachineBasicBlock::iterator Prev = prior(I);
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LV->addVirtualRegisterKilled(SrcReg, Prev);
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// In our final twist, we have to decide which instruction kills the
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// register. In most cases this is the copy, however, the first
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// terminator instruction at the end of the block may also use the value.
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// In this case, we should mark *it* as being the killing block, not the
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// copy.
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bool FirstTerminatorUsesValue = false;
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if (I != opBlock.end()) {
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FirstTerminatorUsesValue = InstructionUsesRegister(I, SrcReg);
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// Check that no other terminators use values.
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#ifndef NDEBUG
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for (MachineBasicBlock::iterator TI = next(I); TI != opBlock.end();
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++TI) {
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assert(!InstructionUsesRegister(TI, SrcReg) &&
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"Terminator instructions cannot use virtual registers unless"
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"they are the first terminator in a block!");
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}
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#endif
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}
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MachineBasicBlock::iterator KillInst;
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if (!FirstTerminatorUsesValue)
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KillInst = prior(I);
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else
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KillInst = I;
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// Finally, mark it killed.
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LV->addVirtualRegisterKilled(SrcReg, KillInst);
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// This vreg no longer lives all of the way through opBlock.
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unsigned opBlockNum = opBlock.getNumber();
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