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Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. In

Browse Source 
particular, we want

   ldr r2, [r3]

to be equivalent to

   ldr r2, [r3, #0]

and not

   ldr r2, [r3, r0]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121808 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2010-12-14 23:40:49 +00:00
parent 257c556d85
commit 2af0fd3fee
1 changed files with 21 additions and 16 deletions
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37
lib/Target/ARM/ARMISelDAGToDAG.cpp
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@ -918,27 +918,15 @@ ARMDAGToDAGISel::SelectThumbAddrModeRI(SDValue N, SDValue &Base,
return false; // We want to select tLDRpci instead. return false; // We want to select tLDRpci instead.
} }
if (N.getOpcode() != ISD::ADD) { if (N.getOpcode() != ISD::ADD)
if (N.getOpcode() == ARMISD::Wrapper && return false;
(!Subtarget->useMovt() ||
N.getOperand(0).getOpcode() != ISD::TargetGlobalAddress))
Base = N.getOperand(0);
else
Base = N;
Offset = CurDAG->getRegister(0, MVT::i32);
return true;
}
// Thumb does not have [sp, r] address mode. // Thumb does not have [sp, r] address mode.
RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0)); RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0));
RegisterSDNode *RHSR = dyn_cast<RegisterSDNode>(N.getOperand(1)); RegisterSDNode *RHSR = dyn_cast<RegisterSDNode>(N.getOperand(1));
if ((LHSR && LHSR->getReg() == ARM::SP) || if ((LHSR && LHSR->getReg() == ARM::SP) ||
(RHSR && RHSR->getReg() == ARM::SP)) { (RHSR && RHSR->getReg() == ARM::SP))
Base = N; return false;
Offset = CurDAG->getRegister(0, MVT::i32);
return true;
}
if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
int RHSC = (int)RHS->getZExtValue(); int RHSC = (int)RHS->getZExtValue();
@ -1003,6 +991,23 @@ ARMDAGToDAGISel::SelectThumbAddrModeImm5S(SDValue N, unsigned Scale,
return true; return true;
} }
RegisterSDNode *LHSR = dyn_cast<RegisterSDNode>(N.getOperand(0));
RegisterSDNode *RHSR = dyn_cast<RegisterSDNode>(N.getOperand(1));
if ((LHSR && LHSR->getReg() == ARM::SP) ||
(RHSR && RHSR->getReg() == ARM::SP)) {
ConstantSDNode *LHS = dyn_cast<ConstantSDNode>(N.getOperand(0));
ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1));
unsigned LHSC = LHS ? LHS->getZExtValue() : 0;
unsigned RHSC = RHS ? RHS->getZExtValue() : 0;
// Thumb does not have [sp, #imm5] address mode for non-zero imm5.
if (LHSC != 0 || RHSC != 0) return false;
Base = N;
OffImm = CurDAG->getTargetConstant(0, MVT::i32);
return true;
}
// If the RHS is + imm5 * scale, fold into addr mode. // If the RHS is + imm5 * scale, fold into addr mode.
if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) { if (ConstantSDNode *RHS = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
int RHSC = (int)RHS->getZExtValue(); int RHSC = (int)RHS->getZExtValue();