6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-07-25 13:24:46 +00:00
Code Issues Projects Releases Wiki Activity

Added field noResults to Instruction.

Browse Source 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25017 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2005-12-26 09:11:45 +00:00
parent 2abbe867ab
commit 2b4ea795a2
10 changed files with 48 additions and 47 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
lib/Target/Sparc/SparcInstrInfo.td
View File

@@ -171,7 +171,7 @@ let usesCustomDAGSchedInserter = 1 in { // Expanded by the scheduler.
// Section A.3 - Synthetic Instructions, p. 85
// special cases of JMPL:
let isReturn = 1, isTerminator = 1, hasDelaySlot = 1 in {
let isReturn = 1, isTerminator = 1, hasDelaySlot = 1, noResults = 1 in {
let rd = O7.Num, rs1 = G0.Num, simm13 = 8 in
// FIXME: temporary workaround for return without an incoming flag.
def RETVOID: F3_2<2, 0b111000, (ops), "retl", [(ret)]>;
@@ -466,6 +466,7 @@ class BranchV8<bits<4> cc, dag ops, string asmstr, list<dag> pattern>
let isBranch = 1;
let isTerminator = 1;
let hasDelaySlot = 1;
let noResults = 1;
}
let isBarrier = 1 in
@@ -511,6 +512,7 @@ class FPBranchV8<bits<4> cc, dag ops, string asmstr, list<dag> pattern>
let isBranch = 1;
let isTerminator = 1;
let hasDelaySlot = 1;
let noResults = 1;
}
def FBU : FPBranchV8<0b0111, (ops brtarget:$dst),
@@ -561,7 +563,7 @@ def FBO : FPBranchV8<0b1111, (ops brtarget:$dst),
// Section B.24 - Call and Link Instruction, p. 125
// This is the only Format 1 instruction
let Uses = [O0, O1, O2, O3, O4, O5],
hasDelaySlot = 1, isCall = 1, hasInFlag = 1, hasOutFlag = 1,
hasDelaySlot = 1, isCall = 1, hasInFlag = 1, hasOutFlag = 1, noResults = 1,
Defs = [O0, O1, O2, O3, O4, O5, O7, G1, G2, G3, G4, G5, G6, G7,
D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15] in {
def CALL : InstV8<(ops calltarget:$dst),