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Removed spurious EnablePPCRS check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47918 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -431,7 +431,6 @@ void PPCRegisterInfo::lowerDynamicAlloc(MachineBasicBlock::iterator II,
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.addReg(PPC::R31)
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.addImm(FrameSize);
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} else if (LP64) {
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if (!EnablePPCRS)
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if (EnablePPCRS) // FIXME (64-bit): Use "true" version.
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BuildMI(MBB, II, TII.get(PPC::LD), Reg)
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.addImm(0)
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@ -513,15 +512,15 @@ void PPCRegisterInfo::lowerCRSpilling(MachineBasicBlock::iterator II,
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const TargetRegisterClass *RC = Subtarget.isPPC64() ? G8RC : GPRC;
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unsigned Reg = findScratchRegister(II, RS, RC, SPAdj);
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// We need to store the CR in the low 4-bits of the saved value. First, issue
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// an MFCR to save all of the CRBits.
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// We need to store the CR in the low 4-bits of the saved value. First, issue
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// an MFCR to save all of the CRBits. Add an implicit kill of the CR.
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if (!MI.getOperand(0).isKill())
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BuildMI(MBB, II, TII.get(PPC::MFCR), Reg);
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else
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// Implicitly kill the CR register.
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BuildMI(MBB, II, TII.get(PPC::MFCR), Reg)
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.addReg(MI.getOperand(0).getReg(), false, true, true);
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// If the saved register wasn't CR0, shift the bits left so that they are in
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// CR0's slot.
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unsigned SrcReg = MI.getOperand(0).getReg();
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