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Another missing X86ISD::MOVLPD pattern. rdar://10450317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144839 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -522,6 +522,8 @@ let Predicates = [HasSSE2] in {
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// fold opportunity reappears.
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def : Pat<(v2f64 (X86Movlpd VR128:$src1, VR128:$src2)),
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(MOVSDrr VR128:$src1, (EXTRACT_SUBREG (v2f64 VR128:$src2),sub_sd))>;
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def : Pat<(v2i64 (X86Movlpd VR128:$src1, VR128:$src2)),
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(MOVSDrr VR128:$src1, (EXTRACT_SUBREG (v2i64 VR128:$src2),sub_sd))>;
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def : Pat<(v4f32 (X86Movlps VR128:$src1, VR128:$src2)),
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(MOVSDrr VR128:$src1, (EXTRACT_SUBREG (v4f32 VR128:$src2),sub_sd))>;
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def : Pat<(v4i32 (X86Movlps VR128:$src1, VR128:$src2)),
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@ -67,3 +67,20 @@ bb:
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%tmp7 = shufflevector <2 x double> %tmp5, <2 x double> %tmp6, <2 x i32> <i32 2, i32 1>
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ret <2 x double> %tmp7
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}
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; rdar://10450317
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define <2 x i64> @t4() nounwind readonly {
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bb:
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; CHECK: t4:
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; CHECK: punpcklqdq %xmm0, %xmm1
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; CHECK: movq (%rax), %xmm0
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; CHECK: movsd %xmm1, %xmm0
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%tmp0 = load i128* null, align 1
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%tmp1 = load <2 x i32>* undef, align 8
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%tmp2 = bitcast i128 %tmp0 to <16 x i8>
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%tmp3 = bitcast <2 x i32> %tmp1 to i64
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%tmp4 = insertelement <2 x i64> undef, i64 %tmp3, i32 0
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%tmp5 = bitcast <16 x i8> %tmp2 to <2 x i64>
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%tmp6 = shufflevector <2 x i64> %tmp4, <2 x i64> %tmp5, <2 x i32> <i32 2, i32 1>
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ret <2 x i64> %tmp6
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}
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