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Oddly people want to use the 'r' constraint for fp constants on x86.

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Fixes rdar://9218925
Fixes PR9601


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131682 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2011-05-19 21:33:47 +00:00
parent 61558aaf4f
commit 2bbecd8f6d
2 changed files with 13 additions and 1 deletions
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2
lib/Target/X86/X86ISelLowering.cpp
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@ -12766,7 +12766,7 @@ X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
return std::make_pair(0U, X86::GR8RegisterClass);
if (VT == MVT::i16)
return std::make_pair(0U, X86::GR16RegisterClass);
if (VT == MVT::i32 || !Subtarget->is64Bit())
if (VT == MVT::i32 || VT == MVT::f32 || !Subtarget->is64Bit())
return std::make_pair(0U, X86::GR32RegisterClass);
return std::make_pair(0U, X86::GR64RegisterClass);
case 'R': // LEGACY_REGS

12
test/CodeGen/X86/9601.ll Normal file
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@ -0,0 +1,12 @@
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
; PR9601
; Previously we'd crash trying to put a 32-bit float into a constraint
; for a normal 'r' register.
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
define void @test() {
entry:
%0 = call float asm sideeffect "xchg $0, $1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* undef, float 2.000000e+00) nounwind
unreachable
}