mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
Simplify CreateLoadLR and CreateStoreLR in MipsISelLowering.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158413 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
777a120285
commit
2bd7e532b4
@ -2070,17 +2070,15 @@ SDValue MipsTargetLowering::LowerShiftRightParts(SDValue Op, SelectionDAG& DAG,
|
||||
|
||||
static SDValue CreateLoadLR(unsigned Opc, SelectionDAG &DAG, LoadSDNode *LD,
|
||||
SDValue Chain, SDValue Src, unsigned Offset) {
|
||||
SDValue BasePtr = LD->getBasePtr(), Ptr;
|
||||
SDValue Ptr = LD->getBasePtr();
|
||||
EVT VT = LD->getValueType(0), MemVT = LD->getMemoryVT();
|
||||
EVT BasePtrVT = BasePtr.getValueType();
|
||||
EVT BasePtrVT = Ptr.getValueType();
|
||||
DebugLoc DL = LD->getDebugLoc();
|
||||
SDVTList VTList = DAG.getVTList(VT, MVT::Other);
|
||||
|
||||
if (Offset)
|
||||
Ptr = DAG.getNode(ISD::ADD, DL, BasePtrVT, BasePtr,
|
||||
Ptr = DAG.getNode(ISD::ADD, DL, BasePtrVT, Ptr,
|
||||
DAG.getConstant(Offset, BasePtrVT));
|
||||
else
|
||||
Ptr = BasePtr;
|
||||
|
||||
SDValue Ops[] = { Chain, Ptr, Src };
|
||||
return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, 3, MemVT,
|
||||
@ -2151,17 +2149,14 @@ SDValue MipsTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
|
||||
|
||||
static SDValue CreateStoreLR(unsigned Opc, SelectionDAG &DAG, StoreSDNode *SD,
|
||||
SDValue Chain, unsigned Offset) {
|
||||
SDValue BasePtr = SD->getBasePtr(), Ptr, Value = SD->getValue();
|
||||
EVT MemVT = SD->getMemoryVT();
|
||||
EVT BasePtrVT = BasePtr.getValueType();
|
||||
SDValue Ptr = SD->getBasePtr(), Value = SD->getValue();
|
||||
EVT MemVT = SD->getMemoryVT(), BasePtrVT = Ptr.getValueType();
|
||||
DebugLoc DL = SD->getDebugLoc();
|
||||
SDVTList VTList = DAG.getVTList(MVT::Other);
|
||||
|
||||
if (Offset)
|
||||
Ptr = DAG.getNode(ISD::ADD, DL, BasePtrVT, BasePtr,
|
||||
Ptr = DAG.getNode(ISD::ADD, DL, BasePtrVT, Ptr,
|
||||
DAG.getConstant(Offset, BasePtrVT));
|
||||
else
|
||||
Ptr = BasePtr;
|
||||
|
||||
SDValue Ops[] = { Chain, Value, Ptr };
|
||||
return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, 3, MemVT,
|
||||
|
Loading…
Reference in New Issue
Block a user