Fix a warning about a variable which is only used in an assertion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121206 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matt Beaumont-Gay 2010-12-07 23:26:21 +00:00
parent fe58f95f36
commit 2bf315f087

View File

@ -667,9 +667,9 @@ getAddrModeThumbSPOpValue(const MCInst &MI, unsigned OpIdx,
SmallVectorImpl<MCFixup> &Fixups) const {
// [SP, #imm]
// {7-0} = imm8
const MCOperand &MO = MI.getOperand(OpIdx);
const MCOperand &MO1 = MI.getOperand(OpIdx + 1);
assert (MO.getReg() == ARM::SP && "Unexpected base register!");
assert (MI.getOperand(OpIdx).getReg() == ARM::SP &&
"Unexpected base register!");
// The immediate is already shifted for the implicit zeroes, so no change
// here.
return MO1.getImm() & 0xff;