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Add missed mayStore flag to STREXD / t2STREXD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148742 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4273,14 +4273,14 @@ def STREXH: AIstrex<0b11, (outs GPR:$Rd), (ins GPR:$Rt, addr_offset_none:$addr),
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NoItinerary, "strexh", "\t$Rd, $Rt, $addr", []>;
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def STREX : AIstrex<0b00, (outs GPR:$Rd), (ins GPR:$Rt, addr_offset_none:$addr),
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NoItinerary, "strex", "\t$Rd, $Rt, $addr", []>;
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}
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let hasExtraSrcRegAllocReq = 1, Constraints = "@earlyclobber $Rd" in
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let hasExtraSrcRegAllocReq = 1 in
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def STREXD : AIstrex<0b01, (outs GPR:$Rd),
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(ins GPR:$Rt, GPR:$Rt2, addr_offset_none:$addr),
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NoItinerary, "strexd", "\t$Rd, $Rt, $Rt2, $addr", []> {
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let DecoderMethod = "DecodeDoubleRegStore";
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}
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}
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def CLREX : AXI<(outs), (ins), MiscFrm, NoItinerary, "clrex", []>,
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Requires<[IsARM, HasV7]> {
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@ -3065,9 +3065,7 @@ def t2STREX : Thumb2I<(outs rGPR:$Rd), (ins rGPR:$Rt,
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let Inst{11-8} = Rd;
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let Inst{7-0} = addr{7-0};
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}
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}
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let hasExtraSrcRegAllocReq = 1, Constraints = "@earlyclobber $Rd" in
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let hasExtraSrcRegAllocReq = 1 in
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def t2STREXD : T2I_strex<0b11, (outs rGPR:$Rd),
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(ins rGPR:$Rt, rGPR:$Rt2, addr_offset_none:$addr),
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AddrModeNone, 4, NoItinerary,
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@ -3076,6 +3074,7 @@ def t2STREXD : T2I_strex<0b11, (outs rGPR:$Rd),
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bits<4> Rt2;
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let Inst{11-8} = Rt2;
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}
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}
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def t2CLREX : T2I<(outs), (ins), NoItinerary, "clrex", "", []>,
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Requires<[IsThumb2, HasV7]> {
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