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Handle ands with 0 and shifts by 0 correctly. These aren't
common, but indvars shouldn't crash on them. This fixes PR4054. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70051 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1754,6 +1754,8 @@ SCEVHandle ScalarEvolution::createSCEV(Value *V) {
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// For an expression like x&255 that merely masks off the high bits,
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// For an expression like x&255 that merely masks off the high bits,
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// use zext(trunc(x)) as the SCEV expression.
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// use zext(trunc(x)) as the SCEV expression.
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if (ConstantInt *CI = dyn_cast<ConstantInt>(U->getOperand(1))) {
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if (ConstantInt *CI = dyn_cast<ConstantInt>(U->getOperand(1))) {
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if (CI->isNullValue())
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return getSCEV(U->getOperand(1));
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const APInt &A = CI->getValue();
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const APInt &A = CI->getValue();
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unsigned Ones = A.countTrailingOnes();
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unsigned Ones = A.countTrailingOnes();
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if (APIntOps::isMask(Ones, A))
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if (APIntOps::isMask(Ones, A))
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@ -1818,7 +1820,12 @@ SCEVHandle ScalarEvolution::createSCEV(Value *V) {
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if (Instruction *L = dyn_cast<Instruction>(U->getOperand(0)))
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if (Instruction *L = dyn_cast<Instruction>(U->getOperand(0)))
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if (L->getOpcode() == Instruction::Shl &&
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if (L->getOpcode() == Instruction::Shl &&
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L->getOperand(1) == U->getOperand(1)) {
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L->getOperand(1) == U->getOperand(1)) {
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uint64_t Amt = getTypeSizeInBits(U->getType()) - CI->getZExtValue();
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unsigned BitWidth = getTypeSizeInBits(U->getType());
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uint64_t Amt = BitWidth - CI->getZExtValue();
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if (Amt == BitWidth)
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return getSCEV(L->getOperand(0)); // shift by zero --> noop
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if (Amt > BitWidth)
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return getIntegerSCEV(0, U->getType()); // value is undefined
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return
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return
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getSignExtendExpr(getTruncateExpr(getSCEV(L->getOperand(0)),
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getSignExtendExpr(getTruncateExpr(getSCEV(L->getOperand(0)),
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IntegerType::get(Amt)),
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IntegerType::get(Amt)),
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23
test/Transforms/IndVarSimplify/avoid-i0.ll
Normal file
23
test/Transforms/IndVarSimplify/avoid-i0.ll
Normal file
@ -0,0 +1,23 @@
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; RUN: llvm-as < %s | opt -indvars
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; PR4054
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; Don't treat an and with 0 as a mask (trunc+zext).
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define i32 @int80(i8 signext %p_71) nounwind {
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entry:
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br label %bb
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bb: ; preds = %bb6, %entry
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%p_71_addr.0 = phi i8 [ %p_71, %entry ], [ %0, %bb6 ] ; <i8> [#uses=0]
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br i1 false, label %bb4, label %bb1
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bb1: ; preds = %bb
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ret i32 0
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bb4: ; preds = %bb4, %bb
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br i1 false, label %bb6, label %bb4
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bb6: ; preds = %bb4
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%0 = and i8 0, 0 ; <i8> [#uses=1]
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br label %bb
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}
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