mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-30 02:32:08 +00:00
Move SSE2 Packed Integer instructions around, and create specific sections for each of them
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107211 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes
parent
da0e89f4c4
commit
2c818072cc
@ -2168,12 +2168,11 @@ def LDMXCSR : PSI<0xAE, MRM2m, (outs), (ins i32mem:$src),
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def STMXCSR : PSI<0xAE, MRM3m, (outs), (ins i32mem:$dst),
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"stmxcsr\t$dst", [(int_x86_sse_stmxcsr addr:$dst)]>;
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//===---------------------------------------------------------------------===//
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// SSE2 - Move Aligned/Unaligned Packed Integer Instructions
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//===---------------------------------------------------------------------===//
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let ExeDomain = SSEPackedInt in { // SSE integer instructions
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//===---------------------------------------------------------------------===//
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// SSE2 - Move Aligned/Unaligned Packed Integers
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//===---------------------------------------------------------------------===//
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let isAsmParserOnly = 1 in {
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let neverHasSideEffects = 1 in
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def VMOVDQArr : VPDI<0x6F, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src),
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@ -2251,16 +2250,19 @@ def MOVDQUmr_Int : I<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
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[(int_x86_sse2_storeu_dq addr:$dst, VR128:$src)]>,
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XS, Requires<[HasSSE2]>;
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let Constraints = "$src1 = $dst" in {
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} // ExeDomain = SSEPackedInt
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multiclass PDI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId,
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bit Commutable = 0> {
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//===---------------------------------------------------------------------===//
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// SSE2 - Packed Integer Arithmetic Instructions
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//===---------------------------------------------------------------------===//
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let ExeDomain = SSEPackedInt in { // SSE integer instructions
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multiclass PDI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId> {
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def rr : PDI<opc, MRMSrcReg, (outs VR128:$dst),
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(ins VR128:$src1, VR128:$src2),
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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[(set VR128:$dst, (IntId VR128:$src1, VR128:$src2))]> {
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let isCommutable = Commutable;
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}
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[(set VR128:$dst, (IntId VR128:$src1, VR128:$src2))]>;
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def rm : PDI<opc, MRMSrcMem, (outs VR128:$dst),
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(ins VR128:$src1, i128mem:$src2),
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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@ -2289,13 +2291,11 @@ multiclass PDI_binop_rmi_int<bits<8> opc, bits<8> opc2, Format ImmForm,
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/// PDI_binop_rm - Simple SSE2 binary operator.
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multiclass PDI_binop_rm<bits<8> opc, string OpcodeStr, SDNode OpNode,
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ValueType OpVT, bit Commutable = 0> {
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ValueType OpVT> {
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def rr : PDI<opc, MRMSrcReg, (outs VR128:$dst),
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(ins VR128:$src1, VR128:$src2),
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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[(set VR128:$dst, (OpVT (OpNode VR128:$src1, VR128:$src2)))]> {
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let isCommutable = Commutable;
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}
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[(set VR128:$dst, (OpVT (OpNode VR128:$src1, VR128:$src2)))]>;
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def rm : PDI<opc, MRMSrcMem, (outs VR128:$dst),
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(ins VR128:$src1, i128mem:$src2),
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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@ -2308,14 +2308,11 @@ multiclass PDI_binop_rm<bits<8> opc, string OpcodeStr, SDNode OpNode,
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/// FIXME: we could eliminate this and use PDI_binop_rm instead if tblgen knew
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/// to collapse (bitconvert VT to VT) into its operand.
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///
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multiclass PDI_binop_rm_v2i64<bits<8> opc, string OpcodeStr, SDNode OpNode,
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bit Commutable = 0> {
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multiclass PDI_binop_rm_v2i64<bits<8> opc, string OpcodeStr, SDNode OpNode> {
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def rr : PDI<opc, MRMSrcReg, (outs VR128:$dst),
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(ins VR128:$src1, VR128:$src2),
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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[(set VR128:$dst, (v2i64 (OpNode VR128:$src1, VR128:$src2)))]> {
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let isCommutable = Commutable;
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}
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[(set VR128:$dst, (v2i64 (OpNode VR128:$src1, VR128:$src2)))]>;
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def rm : PDI<opc, MRMSrcMem, (outs VR128:$dst),
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(ins VR128:$src1, i128mem:$src2),
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!strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
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@ -2323,50 +2320,53 @@ multiclass PDI_binop_rm_v2i64<bits<8> opc, string OpcodeStr, SDNode OpNode,
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(memopv2i64 addr:$src2)))]>;
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}
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} // Constraints = "$src1 = $dst"
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} // ExeDomain = SSEPackedInt
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// 128-bit Integer Arithmetic
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defm PADDB : PDI_binop_rm<0xFC, "paddb", add, v16i8, 1>;
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defm PADDW : PDI_binop_rm<0xFD, "paddw", add, v8i16, 1>;
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defm PADDD : PDI_binop_rm<0xFE, "paddd", add, v4i32, 1>;
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defm PADDQ : PDI_binop_rm_v2i64<0xD4, "paddq", add, 1>;
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defm PADDSB : PDI_binop_rm_int<0xEC, "paddsb" , int_x86_sse2_padds_b, 1>;
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defm PADDSW : PDI_binop_rm_int<0xED, "paddsw" , int_x86_sse2_padds_w, 1>;
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defm PADDUSB : PDI_binop_rm_int<0xDC, "paddusb", int_x86_sse2_paddus_b, 1>;
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defm PADDUSW : PDI_binop_rm_int<0xDD, "paddusw", int_x86_sse2_paddus_w, 1>;
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let Constraints = "$src1 = $dst" in {
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let isCommutable = 1 in {
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defm PADDB : PDI_binop_rm<0xFC, "paddb", add, v16i8>;
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defm PADDW : PDI_binop_rm<0xFD, "paddw", add, v8i16>;
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defm PADDD : PDI_binop_rm<0xFE, "paddd", add, v4i32>;
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defm PADDQ : PDI_binop_rm_v2i64<0xD4, "paddq", add>;
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defm PMULLW : PDI_binop_rm<0xD5, "pmullw", mul, v8i16>;
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}
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defm PSUBB : PDI_binop_rm<0xF8, "psubb", sub, v16i8>;
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defm PSUBW : PDI_binop_rm<0xF9, "psubw", sub, v8i16>;
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defm PSUBD : PDI_binop_rm<0xFA, "psubd", sub, v4i32>;
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defm PSUBQ : PDI_binop_rm_v2i64<0xFB, "psubq", sub>;
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// Intrinsic forms
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defm PSUBSB : PDI_binop_rm_int<0xE8, "psubsb" , int_x86_sse2_psubs_b>;
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defm PSUBSW : PDI_binop_rm_int<0xE9, "psubsw" , int_x86_sse2_psubs_w>;
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defm PSUBUSB : PDI_binop_rm_int<0xD8, "psubusb", int_x86_sse2_psubus_b>;
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defm PSUBUSW : PDI_binop_rm_int<0xD9, "psubusw", int_x86_sse2_psubus_w>;
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let isCommutable = 1 in {
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defm PADDSB : PDI_binop_rm_int<0xEC, "paddsb" , int_x86_sse2_padds_b>;
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defm PADDSW : PDI_binop_rm_int<0xED, "paddsw" , int_x86_sse2_padds_w>;
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defm PADDUSB : PDI_binop_rm_int<0xDC, "paddusb", int_x86_sse2_paddus_b>;
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defm PADDUSW : PDI_binop_rm_int<0xDD, "paddusw", int_x86_sse2_paddus_w>;
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defm PMULHUW : PDI_binop_rm_int<0xE4, "pmulhuw", int_x86_sse2_pmulhu_w>;
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defm PMULHW : PDI_binop_rm_int<0xE5, "pmulhw" , int_x86_sse2_pmulh_w>;
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defm PMULUDQ : PDI_binop_rm_int<0xF4, "pmuludq", int_x86_sse2_pmulu_dq>;
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defm PMADDWD : PDI_binop_rm_int<0xF5, "pmaddwd", int_x86_sse2_pmadd_wd>;
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defm PAVGB : PDI_binop_rm_int<0xE0, "pavgb", int_x86_sse2_pavg_b>;
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defm PAVGW : PDI_binop_rm_int<0xE3, "pavgw", int_x86_sse2_pavg_w>;
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defm PMINUB : PDI_binop_rm_int<0xDA, "pminub", int_x86_sse2_pminu_b>;
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defm PMINSW : PDI_binop_rm_int<0xEA, "pminsw", int_x86_sse2_pmins_w>;
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defm PMAXUB : PDI_binop_rm_int<0xDE, "pmaxub", int_x86_sse2_pmaxu_b>;
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defm PMAXSW : PDI_binop_rm_int<0xEE, "pmaxsw", int_x86_sse2_pmaxs_w>;
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defm PSADBW : PDI_binop_rm_int<0xF6, "psadbw", int_x86_sse2_psad_bw>;
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}
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defm PMULLW : PDI_binop_rm<0xD5, "pmullw", mul, v8i16, 1>;
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defm PMULHUW : PDI_binop_rm_int<0xE4, "pmulhuw", int_x86_sse2_pmulhu_w, 1>;
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defm PMULHW : PDI_binop_rm_int<0xE5, "pmulhw" , int_x86_sse2_pmulh_w , 1>;
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defm PMULUDQ : PDI_binop_rm_int<0xF4, "pmuludq", int_x86_sse2_pmulu_dq, 1>;
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defm PMADDWD : PDI_binop_rm_int<0xF5, "pmaddwd", int_x86_sse2_pmadd_wd, 1>;
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defm PAVGB : PDI_binop_rm_int<0xE0, "pavgb", int_x86_sse2_pavg_b, 1>;
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defm PAVGW : PDI_binop_rm_int<0xE3, "pavgw", int_x86_sse2_pavg_w, 1>;
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defm PMINUB : PDI_binop_rm_int<0xDA, "pminub", int_x86_sse2_pminu_b, 1>;
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defm PMINSW : PDI_binop_rm_int<0xEA, "pminsw", int_x86_sse2_pmins_w, 1>;
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defm PMAXUB : PDI_binop_rm_int<0xDE, "pmaxub", int_x86_sse2_pmaxu_b, 1>;
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defm PMAXSW : PDI_binop_rm_int<0xEE, "pmaxsw", int_x86_sse2_pmaxs_w, 1>;
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defm PSADBW : PDI_binop_rm_int<0xF6, "psadbw", int_x86_sse2_psad_bw, 1>;
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} // Constraints = "$src1 = $dst"
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//===---------------------------------------------------------------------===//
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// SSE2 - Packed Integer Logical Instructions
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//===---------------------------------------------------------------------===//
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let Constraints = "$src1 = $dst" in {
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defm PSLLW : PDI_binop_rmi_int<0xF1, 0x71, MRM6r, "psllw",
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int_x86_sse2_psll_w, int_x86_sse2_pslli_w>;
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defm PSLLD : PDI_binop_rmi_int<0xF2, 0x72, MRM6r, "pslld",
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@ -2386,18 +2386,37 @@ defm PSRAW : PDI_binop_rmi_int<0xE1, 0x71, MRM4r, "psraw",
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defm PSRAD : PDI_binop_rmi_int<0xE2, 0x72, MRM4r, "psrad",
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int_x86_sse2_psra_d, int_x86_sse2_psrai_d>;
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// 128-bit logical shifts.
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let Constraints = "$src1 = $dst", neverHasSideEffects = 1,
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ExeDomain = SSEPackedInt in {
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def PSLLDQri : PDIi8<0x73, MRM7r,
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(outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2),
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"pslldq\t{$src2, $dst|$dst, $src2}", []>;
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def PSRLDQri : PDIi8<0x73, MRM3r,
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(outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2),
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"psrldq\t{$src2, $dst|$dst, $src2}", []>;
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// PSRADQri doesn't exist in SSE[1-3].
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let isCommutable = 1 in {
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defm PAND : PDI_binop_rm_v2i64<0xDB, "pand", and>;
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defm POR : PDI_binop_rm_v2i64<0xEB, "por" , or>;
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defm PXOR : PDI_binop_rm_v2i64<0xEF, "pxor", xor>;
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}
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let ExeDomain = SSEPackedInt in {
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let neverHasSideEffects = 1 in {
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// 128-bit logical shifts.
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def PSLLDQri : PDIi8<0x73, MRM7r,
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(outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2),
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"pslldq\t{$src2, $dst|$dst, $src2}", []>;
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def PSRLDQri : PDIi8<0x73, MRM3r,
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(outs VR128:$dst), (ins VR128:$src1, i32i8imm:$src2),
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"psrldq\t{$src2, $dst|$dst, $src2}", []>;
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// PSRADQri doesn't exist in SSE[1-3].
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}
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def PANDNrr : PDI<0xDF, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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"pandn\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v2i64 (and (vnot VR128:$src1),
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VR128:$src2)))]>;
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def PANDNrm : PDI<0xDF, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, i128mem:$src2),
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"pandn\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v2i64 (and (vnot VR128:$src1),
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(memopv2i64 addr:$src2))))]>;
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}
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} // Constraints = "$src1 = $dst"
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let Predicates = [HasSSE2] in {
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def : Pat<(int_x86_sse2_psll_dq VR128:$src1, imm:$src2),
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(v2i64 (PSLLDQri VR128:$src1, (BYTE_imm imm:$src2)))>;
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@ -2417,32 +2436,20 @@ let Predicates = [HasSSE2] in {
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(v2i64 (PSRLDQri VR128:$src, (BYTE_imm imm:$amt)))>;
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}
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// Logical
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defm PAND : PDI_binop_rm_v2i64<0xDB, "pand", and, 1>;
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defm POR : PDI_binop_rm_v2i64<0xEB, "por" , or , 1>;
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defm PXOR : PDI_binop_rm_v2i64<0xEF, "pxor", xor, 1>;
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//===---------------------------------------------------------------------===//
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// SSE2 - Packed Integer Comparison Instructions
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//===---------------------------------------------------------------------===//
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let Constraints = "$src1 = $dst", ExeDomain = SSEPackedInt in {
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def PANDNrr : PDI<0xDF, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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"pandn\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v2i64 (and (vnot VR128:$src1),
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VR128:$src2)))]>;
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def PANDNrm : PDI<0xDF, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, i128mem:$src2),
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"pandn\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (v2i64 (and (vnot VR128:$src1),
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(memopv2i64 addr:$src2))))]>;
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}
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// SSE2 Integer comparison
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defm PCMPEQB : PDI_binop_rm_int<0x74, "pcmpeqb", int_x86_sse2_pcmpeq_b, 1>;
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defm PCMPEQW : PDI_binop_rm_int<0x75, "pcmpeqw", int_x86_sse2_pcmpeq_w, 1>;
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defm PCMPEQD : PDI_binop_rm_int<0x76, "pcmpeqd", int_x86_sse2_pcmpeq_d, 1>;
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defm PCMPGTB : PDI_binop_rm_int<0x64, "pcmpgtb", int_x86_sse2_pcmpgt_b>;
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defm PCMPGTW : PDI_binop_rm_int<0x65, "pcmpgtw", int_x86_sse2_pcmpgt_w>;
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defm PCMPGTD : PDI_binop_rm_int<0x66, "pcmpgtd", int_x86_sse2_pcmpgt_d>;
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let Constraints = "$src1 = $dst" in {
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let isCommutable = 1 in {
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defm PCMPEQB : PDI_binop_rm_int<0x74, "pcmpeqb", int_x86_sse2_pcmpeq_b>;
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defm PCMPEQW : PDI_binop_rm_int<0x75, "pcmpeqw", int_x86_sse2_pcmpeq_w>;
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defm PCMPEQD : PDI_binop_rm_int<0x76, "pcmpeqd", int_x86_sse2_pcmpeq_d>;
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}
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defm PCMPGTB : PDI_binop_rm_int<0x64, "pcmpgtb", int_x86_sse2_pcmpgt_b>;
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defm PCMPGTW : PDI_binop_rm_int<0x65, "pcmpgtw", int_x86_sse2_pcmpgt_w>;
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defm PCMPGTD : PDI_binop_rm_int<0x66, "pcmpgtd", int_x86_sse2_pcmpgt_d>;
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} // Constraints = "$src1 = $dst"
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def : Pat<(v16i8 (X86pcmpeqb VR128:$src1, VR128:$src2)),
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(PCMPEQBrr VR128:$src1, VR128:$src2)>;
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@ -2470,11 +2477,19 @@ def : Pat<(v4i32 (X86pcmpgtd VR128:$src1, VR128:$src2)),
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def : Pat<(v4i32 (X86pcmpgtd VR128:$src1, (memop addr:$src2))),
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(PCMPGTDrm VR128:$src1, addr:$src2)>;
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//===---------------------------------------------------------------------===//
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// SSE2 - Packed Integer Pack Instructions
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//===---------------------------------------------------------------------===//
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// Pack instructions
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let Constraints = "$src1 = $dst" in {
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defm PACKSSWB : PDI_binop_rm_int<0x63, "packsswb", int_x86_sse2_packsswb_128>;
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defm PACKSSDW : PDI_binop_rm_int<0x6B, "packssdw", int_x86_sse2_packssdw_128>;
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defm PACKUSWB : PDI_binop_rm_int<0x67, "packuswb", int_x86_sse2_packuswb_128>;
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} // Constraints = "$src1 = $dst"
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//===---------------------------------------------------------------------===//
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// SSE2 - Packed Integer Shuffle Instructions
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//===---------------------------------------------------------------------===//
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let ExeDomain = SSEPackedInt in {
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@ -2523,7 +2538,14 @@ def PSHUFLWmi : Ii8<0x70, MRMSrcMem,
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(undef))))]>,
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XD, Requires<[HasSSE2]>;
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// Unpack instructions
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} // ExeDomain = SSEPackedInt
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//===---------------------------------------------------------------------===//
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// SSE2 - Packed Integer Unpack Instructions
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//===---------------------------------------------------------------------===//
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|
||||
let ExeDomain = SSEPackedInt in {
|
||||
|
||||
multiclass sse2_unpack<bits<8> opc, string OpcodeStr, ValueType vt,
|
||||
PatFrag unp_frag, PatFrag bc_frag> {
|
||||
def rr : PDI<opc, MRMSrcReg,
|
||||
@ -2576,6 +2598,14 @@ let Constraints = "$src1 = $dst" in {
|
||||
(memopv2i64 addr:$src2))))]>;
|
||||
}
|
||||
|
||||
} // ExeDomain = SSEPackedInt
|
||||
|
||||
//===---------------------------------------------------------------------===//
|
||||
// SSE2 - Packed Misc Integer Instructions
|
||||
//===---------------------------------------------------------------------===//
|
||||
|
||||
let ExeDomain = SSEPackedInt in {
|
||||
|
||||
// Extract / Insert
|
||||
def PEXTRWri : PDIi8<0xC5, MRMSrcReg,
|
||||
(outs GR32:$dst), (ins VR128:$src1, i32i8imm:$src2),
|
||||
|
||||
Loading…
Reference in New Issue
Block a user