6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-06-26 10:29:57 +00:00
Code Issues Projects Releases Wiki Activity

Fix AllocationPriority not getting set for derived register classes.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233752 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Matthias Braun 2015-03-31 20:52:25 +00:00
parent f067a68207
commit 2c81f7d0a2
1 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
utils/TableGen/CodeGenRegisters.cpp
View File

@ -730,7 +730,8 @@ CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank,
SpillSize(Props.SpillSize),
SpillAlignment(Props.SpillAlignment),
CopyCost(0),
Allocatable(true) {
Allocatable(true),
AllocationPriority(0) {
for (const auto R : Members)
TopoSigs.set(R->getTopoSig());
}
@ -750,6 +751,7 @@ void CodeGenRegisterClass::inheritProperties(CodeGenRegBank &RegBank) {
CopyCost = Super.CopyCost;
Allocatable = Super.Allocatable;
AltOrderSelect = Super.AltOrderSelect;
AllocationPriority = Super.AllocationPriority;
// Copy all allocation orders, filter out foreign registers from the larger
// super-class.