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X86 SSE1 cacheability support ops intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27104 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -626,7 +626,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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}
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}
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// SIMD load ops
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// SIMD load ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_loadhps : GCCBuiltin<"__builtin_ia32_loadhps">,
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def int_x86_sse_loadhps : GCCBuiltin<"__builtin_ia32_loadhps">,
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Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
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@ -643,7 +642,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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}
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}
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// SIMD store ops
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// SIMD store ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_storehps : GCCBuiltin<"__builtin_ia32_storehps">,
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def int_x86_sse_storehps : GCCBuiltin<"__builtin_ia32_storehps">,
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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@ -659,6 +657,27 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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}
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}
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// Cacheability support ops
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_prefetch : GCCBuiltin<"__builtin_ia32_prefetch">,
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Intrinsic<[llvm_ptr_ty, llvm_int_ty], [IntrWriteMem]>;
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}
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_movntq : GCCBuiltin<"__builtin_ia32_movntq">,
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Intrinsic<[llvm_ptr_ty, llvm_v2i32_ty], [IntrWriteMem]>;
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}
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_movntps : GCCBuiltin<"__builtin_ia32_movntps">,
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Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
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}
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
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Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
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}
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_sse_movmskps : GCCBuiltin<"__builtin_ia32_movmskps">,
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def int_x86_sse_movmskps : GCCBuiltin<"__builtin_ia32_movmskps">,
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
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Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;
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