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Register FP regclasses

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76014 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-07-16 14:19:02 +00:00
parent b13057bafa
commit 2c97ae8826
1 changed files with 6 additions and 0 deletions
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6
lib/Target/SystemZ/SystemZISelLowering.cpp
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@ -32,6 +32,7 @@
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/Debug.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/VectorExtras.h"
using namespace llvm;
@ -47,6 +48,11 @@ SystemZTargetLowering::SystemZTargetLowering(SystemZTargetMachine &tm) :
addRegisterClass(MVT::i128, SystemZ::GR128RegisterClass);
addRegisterClass(MVT::v2i64,SystemZ::GR128RegisterClass);
if (!UseSoftFloat) {
addRegisterClass(MVT::f32, SystemZ::FP32RegisterClass);
addRegisterClass(MVT::f64, SystemZ::FP64RegisterClass);
}
// Compute derived properties from the register classes
computeRegisterProperties();