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Enable the Load/Store optimization pass for Thumb1 but make it return immediately for now.
Patch by Moritz Roth! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208991 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -68,7 +68,7 @@ namespace {
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const ARMSubtarget *STI;
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ARMFunctionInfo *AFI;
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RegScavenger *RS;
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bool isThumb2;
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bool isThumb1, isThumb2;
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bool runOnMachineFunction(MachineFunction &Fn) override;
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@ -1520,6 +1520,10 @@ bool ARMLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
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STI = &TM.getSubtarget<ARMSubtarget>();
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RS = new RegScavenger();
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isThumb2 = AFI->isThumb2Function();
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isThumb1 = AFI->isThumbFunction() && !isThumb2;
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// Don't do anything in this pass with Thumb1 for now.
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if (isThumb1) return false;
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bool Modified = false;
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for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
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@ -1581,6 +1585,11 @@ bool ARMPreAllocLoadStoreOpt::runOnMachineFunction(MachineFunction &Fn) {
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MRI = &Fn.getRegInfo();
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MF = &Fn;
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ARMFunctionInfo *AFI = Fn.getInfo<ARMFunctionInfo>();
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bool isThumb1 = AFI->isThumbFunction() && !AFI->isThumb2Function();
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// Don't do anything in this pass with Thumb1 for now.
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if (isThumb1) return false;
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bool Modified = false;
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for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
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++MFI)
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@ -247,8 +247,7 @@ bool ARMPassConfig::addInstSelector() {
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}
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bool ARMPassConfig::addPreRegAlloc() {
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// FIXME: temporarily disabling load / store optimization pass for Thumb1.
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if (getOptLevel() != CodeGenOpt::None && !getARMSubtarget().isThumb1Only())
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if (getOptLevel() != CodeGenOpt::None)
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addPass(createARMLoadStoreOptimizationPass(true));
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if (getOptLevel() != CodeGenOpt::None && getARMSubtarget().isCortexA9())
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addPass(createMLxExpansionPass());
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@ -262,12 +261,10 @@ bool ARMPassConfig::addPreRegAlloc() {
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}
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bool ARMPassConfig::addPreSched2() {
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// FIXME: temporarily disabling load / store optimization pass for Thumb1.
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if (getOptLevel() != CodeGenOpt::None) {
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if (!getARMSubtarget().isThumb1Only()) {
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addPass(createARMLoadStoreOptimizationPass());
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printAndVerify("After ARM load / store optimizer");
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}
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addPass(createARMLoadStoreOptimizationPass());
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printAndVerify("After ARM load / store optimizer");
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if (getARMSubtarget().hasNEON())
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addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
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}
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