From 2ca0efd71a5a25c1f3fa8b30dc5459fdaf8cd2a9 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Thu, 11 May 2006 07:30:26 +0000 Subject: [PATCH] Also add super- register classes info. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28221 91177308-0d34-0410-b5e6-96231b3b80d8 --- utils/TableGen/RegisterInfoEmitter.cpp | 38 ++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 7256ffa35e2..51b88421366 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -166,6 +166,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { OS << " " << RegisterClasses[i].getName() << "Class\t" << RegisterClasses[i].getName() << "RegClass;\n"; + std::map > SuperClassMap; OS << "\n"; // Emit the sub-classes array for each RegisterClass for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { @@ -194,12 +195,48 @@ void RegisterInfoEmitter::run(std::ostream &OS) { if (!Empty) OS << ", "; OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; Empty = false; + + std::map >::iterator SCMI = + SuperClassMap.find(rc2); + if (SCMI == SuperClassMap.end()) { + SuperClassMap.insert(std::make_pair(rc2, std::set())); + SCMI = SuperClassMap.find(rc2); + } + SCMI->second.insert(rc); } OS << (!Empty ? ", " : "") << "NULL"; OS << "\n };\n\n"; } + for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { + const CodeGenRegisterClass &RC = RegisterClasses[rc]; + + // Give the register class a legal C name if it's anonymous. + std::string Name = RC.TheDef->getName(); + + OS << " // " << Name + << " Register Class super-classes...\n const TargetRegisterClass* " + << Name << "Superclasses [] = {\n "; + + bool Empty = true; + std::map >::iterator I = + SuperClassMap.find(rc); + if (I != SuperClassMap.end()) { + for (std::set::iterator II = I->second.begin(), + EE = I->second.end(); II != EE; ++II) { + const CodeGenRegisterClass &RC2 = RegisterClasses[*II]; + if (!Empty) OS << ", "; + OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; + Empty = false; + } + } + + OS << (!Empty ? ", " : "") << "NULL"; + OS << "\n };\n\n"; + } + + for (unsigned i = 0, e = RegisterClasses.size(); i != e; ++i) { const CodeGenRegisterClass &RC = RegisterClasses[i]; OS << RC.MethodBodies << "\n"; @@ -207,6 +244,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { << "Class() : TargetRegisterClass(" << RC.getName() + "VTs" << ", " << RC.getName() + "Subclasses" << ", " + << RC.getName() + "Superclasses" << ", " << RC.SpillSize/8 << ", " << RC.SpillAlignment/8 << ", " << RC.getName() << ", " << RC.getName() << " + " << RC.Elements.size() << ") {}\n";