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Remove support for 'CompositeIndices' and sub-register cycles.

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Now that the weird X86 sub_ss and sub_sd sub-register indexes are gone,
there is no longer a need for the CompositeIndices construct in .td
files. Sub-register index composition can be specified on the
SubRegIndex itself using the ComposedOf field.

Also enforce unique names for sub-registers in TableGen. The same
sub-register cannot be available with multiple sub-register indexes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160842 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-07-26 23:39:50 +00:00
parent 480eeb5431
commit 2ca6b3c374
2 changed files with 19 additions and 67 deletions
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15
include/llvm/Target/Target.td
View File

@ -64,18 +64,6 @@ class Register<string n, list<string> altNames = []> {
// register.
list<RegAltNameIndex> RegAltNameIndices = [];
// CompositeIndices - Specify subreg indices that don't correspond directly to
// a register in SubRegs and are not inherited. The following formats are
// supported:
//
// (a) Identity - Reg:a == Reg
// (a b) Alias - Reg:a == Reg:b
// (a b,c) Composite - Reg:a == (Reg:b):c
//
// This can be used to disambiguate a sub-sub-register that exists in more
// than one subregister and other weird stuff.
list<dag> CompositeIndices = [];
// DwarfNumbers - Numbers used internally by gcc/gdb to identify the register.
// These values can be determined by locating the <target>.h file in the
// directory llvmgcc/gcc/config/<target>/ and looking for REGISTER_NAMES. The
@ -252,9 +240,6 @@ class RegisterTuples<list<SubRegIndex> Indices, list<dag> Regs> {
// SubRegIndices - N SubRegIndex instances. This provides the names of the
// sub-registers in the synthesized super-registers.
list<SubRegIndex> SubRegIndices = Indices;
// Compose sub-register indices like in a normal Register.
list<dag> CompositeIndices = [];
}

71
utils/TableGen/CodeGenRegisters.cpp
View File

@ -187,10 +187,7 @@ bool CodeGenRegister::inheritRegUnits(CodeGenRegBank &RegBank) {
unsigned OldNumUnits = RegUnits.size();
for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end();
I != E; ++I) {
// Strangely a register may have itself as a subreg (self-cycle) e.g. XMM.
CodeGenRegister *SR = I->second;
if (SR == this)
continue;
// Merge the subregister's units into this register's RegUnits.
mergeRegUnits(RegUnits, SR->RegUnits);
}
@ -260,44 +257,6 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
}
}
// Process the composites.
ListInit *Comps = TheDef->getValueAsListInit("CompositeIndices");
for (unsigned i = 0, e = Comps->size(); i != e; ++i) {
DagInit *Pat = dynamic_cast<DagInit*>(Comps->getElement(i));
if (!Pat)
throw TGError(TheDef->getLoc(), "Invalid dag '" +
Comps->getElement(i)->getAsString() +
"' in CompositeIndices");
DefInit *BaseIdxInit = dynamic_cast<DefInit*>(Pat->getOperator());
if (!BaseIdxInit || !BaseIdxInit->getDef()->isSubClassOf("SubRegIndex"))
throw TGError(TheDef->getLoc(), "Invalid SubClassIndex in " +
Pat->getAsString());
CodeGenSubRegIndex *BaseIdx = RegBank.getSubRegIdx(BaseIdxInit->getDef());
// Resolve list of subreg indices into R2.
CodeGenRegister *R2 = this;
for (DagInit::const_arg_iterator di = Pat->arg_begin(),
de = Pat->arg_end(); di != de; ++di) {
DefInit *IdxInit = dynamic_cast<DefInit*>(*di);
if (!IdxInit || !IdxInit->getDef()->isSubClassOf("SubRegIndex"))
throw TGError(TheDef->getLoc(), "Invalid SubClassIndex in " +
Pat->getAsString());
CodeGenSubRegIndex *Idx = RegBank.getSubRegIdx(IdxInit->getDef());
const SubRegMap &R2Subs = R2->computeSubRegs(RegBank);
SubRegMap::const_iterator ni = R2Subs.find(Idx);
if (ni == R2Subs.end())
throw TGError(TheDef->getLoc(), "Composite " + Pat->getAsString() +
" refers to bad index in " + R2->getName());
R2 = ni->second;
}
// Insert composite index. Allow overriding inherited indices etc.
SubRegs[BaseIdx] = R2;
// R2 is no longer an orphan.
Orphans.erase(R2);
}
// Now Orphans contains the inherited subregisters without a direct index.
// Create inferred indexes for all missing entries.
// Work backwards in the Indices vector in order to compose subregs bottom-up.
@ -327,14 +286,25 @@ CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) {
// Compute the inverse SubReg -> Idx map.
for (SubRegMap::const_iterator SI = SubRegs.begin(), SE = SubRegs.end();
SI != SE; ++SI) {
// Ignore idempotent sub-register indices.
if (SI->second == this)
if (SI->second == this) {
SMLoc Loc;
if (TheDef)
Loc = TheDef->getLoc();
throw TGError(Loc, "Register " + getName() +
" has itself as a sub-register");
}
// Ensure that every sub-register has a unique name.
DenseMap<const CodeGenRegister*, CodeGenSubRegIndex*>::iterator Ins =
SubReg2Idx.insert(std::make_pair(SI->second, SI->first)).first;
if (Ins->second == SI->first)
continue;
// Is is possible to have multiple names for the same sub-register.
// For example, XMM0 appears as sub_xmm, sub_sd, and sub_ss in YMM0.
// Eventually, this degeneration should go away, but for now we simply give
// precedence to the explicit sub-register index over the inherited ones.
SubReg2Idx.insert(std::make_pair(SI->second, SI->first));
// Trouble: Two different names for SI->second.
SMLoc Loc;
if (TheDef)
Loc = TheDef->getLoc();
throw TGError(Loc, "Sub-register can't have two names: " +
SI->second->getName() + " available as " +
SI->first->getName() + " and " + Ins->second->getName());
}
// Derive possible names for sub-register concatenations from any explicit
@ -508,8 +478,6 @@ void CodeGenRegister::computeSuperRegs(CodeGenRegBank &RegBank) {
Id.push_back(I->first->EnumValue);
Id.push_back(I->second->TopoSig);
if (I->second == this)
continue;
// Don't add duplicate entries.
if (!I->second->SuperRegs.empty() && I->second->SuperRegs.back() == this)
continue;
@ -530,8 +498,7 @@ CodeGenRegister::addSubRegsPreOrder(SetVector<const CodeGenRegister*> &OSet,
// Add any secondary sub-registers that weren't part of the explicit tree.
for (SubRegMap::const_iterator I = SubRegs.begin(), E = SubRegs.end();
I != E; ++I)
if (I->second != this)
OSet.insert(I->second);
OSet.insert(I->second);
}
// Compute overlapping registers.