mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-02 11:30:10 +00:00
[x86] Cleanup and generate precise FileCheck assertions for a bunch of
SSE tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218947 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth
parent
9e7173e74d
commit
2ce5aac548
@ -1,9 +1,11 @@
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; RUN: llc < %s -march=x86-64 -mcpu=nehalem | FileCheck %s
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; CHECK-LABEL: a:
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; CHECK: movdqu
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; CHECK: pshufd
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define <4 x float> @a(<4 x float>* %y) nounwind {
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; CHECK-LABEL: a:
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; CHECK: # BB#0:
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; CHECK-NEXT: movdqu (%rdi), %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
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; CHECK-NEXT: retq
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%x = load <4 x float>* %y, align 4
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%a = extractelement <4 x float> %x, i32 0
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%b = extractelement <4 x float> %x, i32 1
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@ -16,10 +18,12 @@ define <4 x float> @a(<4 x float>* %y) nounwind {
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ret <4 x float> %s
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}
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; CHECK-LABEL: b:
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; CHECK: movups
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; CHECK: unpckhps
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define <4 x float> @b(<4 x float>* %y, <4 x float> %z) nounwind {
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; CHECK-LABEL: b:
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; CHECK: # BB#0:
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; CHECK-NEXT: movups (%rdi), %xmm1
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; CHECK-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; CHECK-NEXT: retq
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%x = load <4 x float>* %y, align 4
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%a = extractelement <4 x float> %x, i32 2
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%b = extractelement <4 x float> %x, i32 3
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@ -32,10 +36,12 @@ define <4 x float> @b(<4 x float>* %y, <4 x float> %z) nounwind {
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ret <4 x float> %s
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}
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; CHECK-LABEL: c:
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; CHECK: movupd
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; CHECK: shufpd
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define <2 x double> @c(<2 x double>* %y) nounwind {
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; CHECK-LABEL: c:
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; CHECK: # BB#0:
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; CHECK-NEXT: movupd (%rdi), %xmm0
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; CHECK-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1,0]
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; CHECK-NEXT: retq
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%x = load <2 x double>* %y, align 8
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%a = extractelement <2 x double> %x, i32 0
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%c = extractelement <2 x double> %x, i32 1
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@ -44,10 +50,12 @@ define <2 x double> @c(<2 x double>* %y) nounwind {
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ret <2 x double> %r
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}
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; CHECK-LABEL: d:
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; CHECK: movupd
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; CHECK: unpckhpd
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define <2 x double> @d(<2 x double>* %y, <2 x double> %z) nounwind {
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; CHECK-LABEL: d:
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; CHECK: # BB#0:
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; CHECK-NEXT: movupd (%rdi), %xmm1
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; CHECK-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1],xmm1[1]
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; CHECK-NEXT: retq
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%x = load <2 x double>* %y, align 8
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%a = extractelement <2 x double> %x, i32 1
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%c = extractelement <2 x double> %z, i32 1
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@ -2,39 +2,48 @@
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; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=pentium4 -O3 | FileCheck %s
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define void @test1(<2 x double>* %r, <2 x double>* %A, double %B) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movapd (%ecx), %xmm0
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; CHECK-NEXT: movlpd {{[0-9]+}}(%esp), %xmm0
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; CHECK-NEXT: movapd %xmm0, (%eax)
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; CHECK-NEXT: retl
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%tmp3 = load <2 x double>* %A, align 16
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%tmp7 = insertelement <2 x double> undef, double %B, i32 0
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%tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 2, i32 1 >
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store <2 x double> %tmp9, <2 x double>* %r, align 16
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ret void
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; CHECK-LABEL: test1:
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; CHECK: movl 4(%esp), %eax
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; CHECK-NEXT: movl 8(%esp), %ecx
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; CHECK-NEXT: movapd (%ecx), %xmm0
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; CHECK-NEXT: movlpd 12(%esp), %xmm0
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; CHECK-NEXT: movapd %xmm0, (%eax)
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; CHECK-NEXT: ret
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}
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define void @test2(<2 x double>* %r, <2 x double>* %A, double %B) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movapd (%ecx), %xmm0
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; CHECK-NEXT: movhpd {{[0-9]+}}(%esp), %xmm0
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; CHECK-NEXT: movapd %xmm0, (%eax)
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; CHECK-NEXT: retl
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%tmp3 = load <2 x double>* %A, align 16
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%tmp7 = insertelement <2 x double> undef, double %B, i32 0
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%tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 0, i32 2 >
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store <2 x double> %tmp9, <2 x double>* %r, align 16
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ret void
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; CHECK-LABEL: test2:
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; CHECK: movl 4(%esp), %eax
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; CHECK: movl 8(%esp), %ecx
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; CHECK-NEXT: movapd (%ecx), %xmm0
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; CHECK-NEXT: movhpd 12(%esp), %xmm0
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; CHECK-NEXT: movapd %xmm0, (%eax)
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; CHECK-NEXT: ret
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}
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define void @test3(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movaps (%edx), %xmm0
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; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
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; CHECK-NEXT: movaps %xmm0, (%eax)
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; CHECK-NEXT: retl
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%tmp = load <4 x float>* %B ; <<4 x float>> [#uses=2]
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%tmp3 = load <4 x float>* %A ; <<4 x float>> [#uses=2]
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%tmp.upgrd.1 = extractelement <4 x float> %tmp3, i32 0 ; <float> [#uses=1]
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@ -47,24 +56,30 @@ define void @test3(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B) nounwind
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%tmp13 = insertelement <4 x float> %tmp12, float %tmp9, i32 3 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp13, <4 x float>* %res
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ret void
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; CHECK: @test3
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; CHECK: unpcklps
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}
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define void @test4(<4 x float> %X, <4 x float>* %res) nounwind {
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; CHECK-LABEL: test4:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,3,0]
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; CHECK-NEXT: movdqa %xmm0, (%eax)
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; CHECK-NEXT: retl
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%tmp5 = shufflevector <4 x float> %X, <4 x float> undef, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp5, <4 x float>* %res
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ret void
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; CHECK: @test4
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; CHECK: pshufd $50, %xmm0, %xmm0
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}
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define <4 x i32> @test5(i8** %ptr) nounwind {
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; CHECK-LABEL: test5:
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; CHECK: pxor
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; CHECK: punpcklbw
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; CHECK: punpcklwd
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; CHECK: ## BB#0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl (%eax), %eax
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; CHECK-NEXT: movss (%eax), %xmm1
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; CHECK-NEXT: pxor %xmm0, %xmm0
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; CHECK-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
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; CHECK-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
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; CHECK-NEXT: retl
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%tmp = load i8** %ptr ; <i8*> [#uses=1]
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%tmp.upgrd.1 = bitcast i8* %tmp to float* ; <float*> [#uses=1]
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%tmp.upgrd.2 = load float* %tmp.upgrd.1 ; <float> [#uses=1]
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@ -81,30 +96,39 @@ define <4 x i32> @test5(i8** %ptr) nounwind {
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}
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define void @test6(<4 x float>* %res, <4 x float>* %A) nounwind {
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%tmp1 = load <4 x float>* %A ; <<4 x float>> [#uses=1]
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%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp2, <4 x float>* %res
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ret void
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; CHECK-LABEL: test6:
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; CHECK: movaps (%ecx), %xmm0
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; CHECK: movaps %xmm0, (%eax)
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; CHECK: ## BB#0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movaps (%ecx), %xmm0
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; CHECK-NEXT: movaps %xmm0, (%eax)
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; CHECK-NEXT: retl
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%tmp1 = load <4 x float>* %A ; <<4 x float>> [#uses=1]
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%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp2, <4 x float>* %res
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ret void
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}
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define void @test7() nounwind {
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bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:1 [#uses=1]
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shufflevector <4 x float> %1, <4 x float> zeroinitializer, <4 x i32> zeroinitializer ; <<4 x float>>:2 [#uses=1]
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store <4 x float> %2, <4 x float>* null
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ret void
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; CHECK-LABEL: test7:
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; CHECK: xorps %xmm0, %xmm0
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; CHECK: movaps %xmm0, 0
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; CHECK: ## BB#0:
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; CHECK-NEXT: xorps %xmm0, %xmm0
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; CHECK-NEXT: movaps %xmm0, 0
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; CHECK-NEXT: retl
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bitcast <4 x i32> zeroinitializer to <4 x float> ; <<4 x float>>:1 [#uses=1]
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shufflevector <4 x float> %1, <4 x float> zeroinitializer, <4 x i32> zeroinitializer ; <<4 x float>>:2 [#uses=1]
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store <4 x float> %2, <4 x float>* null
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ret void
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}
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@x = external global [4 x i32]
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define <2 x i64> @test8() nounwind {
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; CHECK-LABEL: test8:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movl L_x$non_lazy_ptr, %eax
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; CHECK-NEXT: movups (%eax), %xmm0
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; CHECK-NEXT: retl
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%tmp = load i32* getelementptr ([4 x i32]* @x, i32 0, i32 0) ; <i32> [#uses=1]
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%tmp3 = load i32* getelementptr ([4 x i32]* @x, i32 0, i32 1) ; <i32> [#uses=1]
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%tmp5 = load i32* getelementptr ([4 x i32]* @x, i32 0, i32 2) ; <i32> [#uses=1]
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@ -115,90 +139,123 @@ define <2 x i64> @test8() nounwind {
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%tmp15 = insertelement <4 x i32> %tmp14, i32 %tmp7, i32 3 ; <<4 x i32>> [#uses=1]
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%tmp16 = bitcast <4 x i32> %tmp15 to <2 x i64> ; <<2 x i64>> [#uses=1]
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ret <2 x i64> %tmp16
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; CHECK-LABEL: test8:
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; CHECK: movups (%eax), %xmm0
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}
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define <4 x float> @test9(i32 %dummy, float %a, float %b, float %c, float %d) nounwind {
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; CHECK-LABEL: test9:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movups {{[0-9]+}}(%esp), %xmm0
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; CHECK-NEXT: retl
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%tmp = insertelement <4 x float> undef, float %a, i32 0 ; <<4 x float>> [#uses=1]
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%tmp11 = insertelement <4 x float> %tmp, float %b, i32 1 ; <<4 x float>> [#uses=1]
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%tmp12 = insertelement <4 x float> %tmp11, float %c, i32 2 ; <<4 x float>> [#uses=1]
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%tmp13 = insertelement <4 x float> %tmp12, float %d, i32 3 ; <<4 x float>> [#uses=1]
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ret <4 x float> %tmp13
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; CHECK-LABEL: test9:
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; CHECK: movups 8(%esp), %xmm0
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}
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define <4 x float> @test10(float %a, float %b, float %c, float %d) nounwind {
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; CHECK-LABEL: test10:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movaps {{[0-9]+}}(%esp), %xmm0
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; CHECK-NEXT: retl
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%tmp = insertelement <4 x float> undef, float %a, i32 0 ; <<4 x float>> [#uses=1]
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%tmp11 = insertelement <4 x float> %tmp, float %b, i32 1 ; <<4 x float>> [#uses=1]
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%tmp12 = insertelement <4 x float> %tmp11, float %c, i32 2 ; <<4 x float>> [#uses=1]
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%tmp13 = insertelement <4 x float> %tmp12, float %d, i32 3 ; <<4 x float>> [#uses=1]
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ret <4 x float> %tmp13
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; CHECK-LABEL: test10:
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; CHECK: movaps 4(%esp), %xmm0
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}
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define <2 x double> @test11(double %a, double %b) nounwind {
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; CHECK-LABEL: test11:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movaps {{[0-9]+}}(%esp), %xmm0
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; CHECK-NEXT: retl
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%tmp = insertelement <2 x double> undef, double %a, i32 0 ; <<2 x double>> [#uses=1]
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%tmp7 = insertelement <2 x double> %tmp, double %b, i32 1 ; <<2 x double>> [#uses=1]
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ret <2 x double> %tmp7
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; CHECK-LABEL: test11:
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; CHECK: movaps 4(%esp), %xmm0
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}
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define void @test12() nounwind {
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%tmp1 = load <4 x float>* null ; <<4 x float>> [#uses=2]
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%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x i32> < i32 0, i32 1, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
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%tmp3 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
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%tmp4 = fadd <4 x float> %tmp2, %tmp3 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp4, <4 x float>* null
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ret void
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; CHECK-LABEL: test12:
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; CHECK: movhlps
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; CHECK: shufps
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; CHECK: ## BB#0:
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; CHECK-NEXT: movaps 0, %xmm0
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; CHECK-NEXT: xorps %xmm1, %xmm1
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; CHECK-NEXT: movhlps {{.*#+}} xmm1 = xmm0[1],xmm1[1]
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],mem[2,3]
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; CHECK-NEXT: addps %xmm1, %xmm0
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; CHECK-NEXT: movaps %xmm0, 0
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; CHECK-NEXT: retl
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%tmp1 = load <4 x float>* null ; <<4 x float>> [#uses=2]
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%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 >, <4 x i32> < i32 0, i32 1, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
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%tmp3 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
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%tmp4 = fadd <4 x float> %tmp2, %tmp3 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp4, <4 x float>* null
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ret void
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}
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define void @test13(<4 x float>* %res, <4 x float>* %A, <4 x float>* %B, <4 x float>* %C) nounwind {
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%tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=1]
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%tmp5 = load <4 x float>* %C ; <<4 x float>> [#uses=1]
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%tmp11 = shufflevector <4 x float> %tmp3, <4 x float> %tmp5, <4 x i32> < i32 1, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp11, <4 x float>* %res
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ret void
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; CHECK: test13
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; CHECK: shufps $69, (%ecx), %xmm0
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; CHECK: pshufd $-40, %xmm0, %xmm0
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; CHECK-LABEL: test13:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
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; CHECK-NEXT: movaps (%edx), %xmm0
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; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1],mem[0,1]
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
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; CHECK-NEXT: movdqa %xmm0, (%eax)
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; CHECK-NEXT: retl
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%tmp3 = load <4 x float>* %B ; <<4 x float>> [#uses=1]
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%tmp5 = load <4 x float>* %C ; <<4 x float>> [#uses=1]
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%tmp11 = shufflevector <4 x float> %tmp3, <4 x float> %tmp5, <4 x i32> < i32 1, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp11, <4 x float>* %res
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ret void
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}
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|
||||
define <4 x float> @test14(<4 x float>* %x, <4 x float>* %y) nounwind {
|
||||
%tmp = load <4 x float>* %y ; <<4 x float>> [#uses=2]
|
||||
%tmp5 = load <4 x float>* %x ; <<4 x float>> [#uses=2]
|
||||
%tmp9 = fadd <4 x float> %tmp5, %tmp ; <<4 x float>> [#uses=1]
|
||||
%tmp21 = fsub <4 x float> %tmp5, %tmp ; <<4 x float>> [#uses=1]
|
||||
%tmp27 = shufflevector <4 x float> %tmp9, <4 x float> %tmp21, <4 x i32> < i32 0, i32 1, i32 4, i32 5 > ; <<4 x float>> [#uses=1]
|
||||
ret <4 x float> %tmp27
|
||||
; CHECK-LABEL: test14:
|
||||
; CHECK: addps [[X1:%xmm[0-9]+]], [[X0:%xmm[0-9]+]]
|
||||
; CHECK: subps [[X1]], [[X2:%xmm[0-9]+]]
|
||||
; CHECK: movlhps [[X2]], [[X0]]
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; CHECK-NEXT: movaps (%ecx), %xmm1
|
||||
; CHECK-NEXT: movaps (%eax), %xmm2
|
||||
; CHECK-NEXT: movaps %xmm2, %xmm0
|
||||
; CHECK-NEXT: addps %xmm1, %xmm0
|
||||
; CHECK-NEXT: subps %xmm1, %xmm2
|
||||
; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm2[0]
|
||||
; CHECK-NEXT: retl
|
||||
%tmp = load <4 x float>* %y ; <<4 x float>> [#uses=2]
|
||||
%tmp5 = load <4 x float>* %x ; <<4 x float>> [#uses=2]
|
||||
%tmp9 = fadd <4 x float> %tmp5, %tmp ; <<4 x float>> [#uses=1]
|
||||
%tmp21 = fsub <4 x float> %tmp5, %tmp ; <<4 x float>> [#uses=1]
|
||||
%tmp27 = shufflevector <4 x float> %tmp9, <4 x float> %tmp21, <4 x i32> < i32 0, i32 1, i32 4, i32 5 > ; <<4 x float>> [#uses=1]
|
||||
ret <4 x float> %tmp27
|
||||
}
|
||||
|
||||
define <4 x float> @test15(<4 x float>* %x, <4 x float>* %y) nounwind {
|
||||
entry:
|
||||
%tmp = load <4 x float>* %y ; <<4 x float>> [#uses=1]
|
||||
%tmp3 = load <4 x float>* %x ; <<4 x float>> [#uses=1]
|
||||
%tmp4 = shufflevector <4 x float> %tmp3, <4 x float> %tmp, <4 x i32> < i32 2, i32 3, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
|
||||
ret <4 x float> %tmp4
|
||||
; CHECK-LABEL: test15:
|
||||
; CHECK: movhlps %xmm1, %xmm0
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
|
||||
; CHECK-NEXT: movaps (%ecx), %xmm0
|
||||
; CHECK-NEXT: movaps (%eax), %xmm1
|
||||
; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm1[1],xmm0[1]
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
%tmp = load <4 x float>* %y ; <<4 x float>> [#uses=1]
|
||||
%tmp3 = load <4 x float>* %x ; <<4 x float>> [#uses=1]
|
||||
%tmp4 = shufflevector <4 x float> %tmp3, <4 x float> %tmp, <4 x i32> < i32 2, i32 3, i32 6, i32 7 > ; <<4 x float>> [#uses=1]
|
||||
ret <4 x float> %tmp4
|
||||
}
|
||||
|
||||
; PR8900
|
||||
; CHECK-LABEL: test16:
|
||||
; CHECK: unpcklpd
|
||||
; CHECK: ret
|
||||
|
||||
define <2 x double> @test16(<4 x double> * nocapture %srcA, <2 x double>* nocapture %dst) {
|
||||
; CHECK-LABEL: test16:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; CHECK-NEXT: movapd 96(%eax), %xmm0
|
||||
; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0]
|
||||
; CHECK-NEXT: retl
|
||||
%i5 = getelementptr inbounds <4 x double>* %srcA, i32 3
|
||||
%i6 = load <4 x double>* %i5, align 32
|
||||
%i7 = shufflevector <4 x double> %i6, <4 x double> undef, <2 x i32> <i32 0, i32 2>
|
||||
@ -207,6 +264,11 @@ define <2 x double> @test16(<4 x double> * nocapture %srcA, <2 x double>* nocap
|
||||
|
||||
; PR9009
|
||||
define fastcc void @test17() nounwind {
|
||||
; CHECK-LABEL: test17:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: movaps {{.*#+}} xmm0 = <u,u,32768,32768>
|
||||
; CHECK-NEXT: movaps %xmm0, (%eax)
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
%0 = insertelement <4 x i32> undef, i32 undef, i32 1
|
||||
%1 = shufflevector <4 x i32> <i32 undef, i32 undef, i32 32768, i32 32768>, <4 x i32> %0, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
|
||||
@ -217,25 +279,57 @@ entry:
|
||||
|
||||
; PR9210
|
||||
define <4 x float> @f(<4 x double>) nounwind {
|
||||
; CHECK-LABEL: f:
|
||||
; CHECK: ## BB#0: ## %entry
|
||||
; CHECK-NEXT: cvtpd2ps %xmm1, %xmm1
|
||||
; CHECK-NEXT: cvtpd2ps %xmm0, %xmm0
|
||||
; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
||||
; CHECK-NEXT: retl
|
||||
entry:
|
||||
%double2float.i = fptrunc <4 x double> %0 to <4 x float>
|
||||
ret <4 x float> %double2float.i
|
||||
}
|
||||
|
||||
define <2 x i64> @test_insert_64_zext(<2 x i64> %i) {
|
||||
; CHECK-LABEL: test_insert_64_zext
|
||||
; CHECK-NOT: xor
|
||||
; CHECK: movq
|
||||
; CHECK-LABEL: test_insert_64_zext:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: movq %xmm0, %xmm0
|
||||
; CHECK-NEXT: retl
|
||||
%1 = shufflevector <2 x i64> %i, <2 x i64> <i64 0, i64 undef>, <2 x i32> <i32 0, i32 2>
|
||||
ret <2 x i64> %1
|
||||
}
|
||||
|
||||
define <4 x i32> @PR19721(<4 x i32> %i) {
|
||||
; CHECK-LABEL: PR19721:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,0,0,0]
|
||||
; CHECK-NEXT: movd %xmm1, %eax
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,0,0,0]
|
||||
; CHECK-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
|
||||
; CHECK-NEXT: movd %xmm0, %ecx
|
||||
; CHECK-NEXT: movd %xmm1, %edx
|
||||
; CHECK-NEXT: movd %edx, %xmm0
|
||||
; CHECK-NEXT: movd %ecx, %xmm1
|
||||
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
|
||||
; CHECK-NEXT: movd %eax, %xmm0
|
||||
; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0],xmm1[0,1]
|
||||
; CHECK-NEXT: retl
|
||||
%bc = bitcast <4 x i32> %i to i128
|
||||
%insert = and i128 %bc, -4294967296
|
||||
%bc2 = bitcast i128 %insert to <4 x i32>
|
||||
ret <4 x i32> %bc2
|
||||
|
||||
; CHECK-LABEL: PR19721
|
||||
; CHECK: punpckldq
|
||||
}
|
||||
|
||||
define <4 x i32> @test_mul(<4 x i32> %x, <4 x i32> %y) {
|
||||
; CHECK-LABEL: test_mul:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,0,3,0]
|
||||
; CHECK-NEXT: pmuludq %xmm1, %xmm0
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,0,3,0]
|
||||
; CHECK-NEXT: pmuludq %xmm2, %xmm1
|
||||
; CHECK-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,1,3]
|
||||
; CHECK-NEXT: retl
|
||||
%m = mul <4 x i32> %x, %y
|
||||
ret <4 x i32> %m
|
||||
}
|
||||
|
||||
@ -1,12 +1,17 @@
|
||||
; These are tests for SSE3 codegen.
|
||||
|
||||
; RUN: llc < %s -march=x86-64 -mcpu=nocona -mtriple=i686-apple-darwin9 -O3 \
|
||||
; RUN: | FileCheck %s --check-prefix=X64
|
||||
; RUN: llc < %s -march=x86-64 -mcpu=nocona -mtriple=i686-apple-darwin9 -O3 | FileCheck %s --check-prefix=X64
|
||||
|
||||
; Test for v8xi16 lowering where we extract the first element of the vector and
|
||||
; placed it in the second element of the result.
|
||||
|
||||
define void @t0(<8 x i16>* %dest, <8 x i16>* %old) nounwind {
|
||||
; X64-LABEL: t0:
|
||||
; X64: ## BB#0: ## %entry
|
||||
; X64-NEXT: movdqa (%rsi), %xmm0
|
||||
; X64-NEXT: pslldq $2, %xmm0
|
||||
; X64-NEXT: movdqa %xmm0, (%rdi)
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%tmp3 = load <8 x i16>* %old
|
||||
%tmp6 = shufflevector <8 x i16> %tmp3,
|
||||
@ -15,85 +20,94 @@ entry:
|
||||
store <8 x i16> %tmp6, <8 x i16>* %dest
|
||||
ret void
|
||||
|
||||
; X64-LABEL: t0:
|
||||
; X64: movdqa (%rsi), %xmm0
|
||||
; X64: pslldq $2, %xmm0
|
||||
; X64: movdqa %xmm0, (%rdi)
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
define <8 x i16> @t1(<8 x i16>* %A, <8 x i16>* %B) nounwind {
|
||||
; X64-LABEL: t1:
|
||||
; X64: ## BB#0:
|
||||
; X64-NEXT: movdqa (%rdi), %xmm0
|
||||
; X64-NEXT: pinsrw $0, (%rsi), %xmm0
|
||||
; X64-NEXT: retq
|
||||
%tmp1 = load <8 x i16>* %A
|
||||
%tmp2 = load <8 x i16>* %B
|
||||
%tmp3 = shufflevector <8 x i16> %tmp1, <8 x i16> %tmp2, <8 x i32> < i32 8, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
|
||||
ret <8 x i16> %tmp3
|
||||
|
||||
; X64-LABEL: t1:
|
||||
; X64: movdqa (%rdi), %xmm0
|
||||
; X64: pinsrw $0, (%rsi), %xmm0
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
define <8 x i16> @t2(<8 x i16> %A, <8 x i16> %B) nounwind {
|
||||
; X64-LABEL: t2:
|
||||
; X64: ## BB#0:
|
||||
; X64-NEXT: pextrw $1, %xmm1, %eax
|
||||
; X64-NEXT: pinsrw $0, %eax, %xmm0
|
||||
; X64-NEXT: pinsrw $3, %eax, %xmm0
|
||||
; X64-NEXT: retq
|
||||
%tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 9, i32 1, i32 2, i32 9, i32 4, i32 5, i32 6, i32 7 >
|
||||
ret <8 x i16> %tmp
|
||||
; X64-LABEL: t2:
|
||||
; X64: pextrw $1, %xmm1, %eax
|
||||
; X64: pinsrw $0, %eax, %xmm0
|
||||
; X64: pinsrw $3, %eax, %xmm0
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
define <8 x i16> @t3(<8 x i16> %A, <8 x i16> %B) nounwind {
|
||||
; X64-LABEL: t3:
|
||||
; X64: ## BB#0:
|
||||
; X64-NEXT: pextrw $5, %xmm0, %eax
|
||||
; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,3,2,0,4,5,6,7]
|
||||
; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
|
||||
; X64-NEXT: pinsrw $3, %eax, %xmm0
|
||||
; X64-NEXT: retq
|
||||
%tmp = shufflevector <8 x i16> %A, <8 x i16> %A, <8 x i32> < i32 8, i32 3, i32 2, i32 13, i32 7, i32 6, i32 5, i32 4 >
|
||||
ret <8 x i16> %tmp
|
||||
; X64-LABEL: t3:
|
||||
; X64: pextrw $5, %xmm0, %eax
|
||||
; X64: pshuflw $44, %xmm0, %xmm0
|
||||
; X64: pshufhw $27, %xmm0, %xmm0
|
||||
; X64: pinsrw $3, %eax, %xmm0
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind {
|
||||
; X64-LABEL: t4:
|
||||
; X64: ## BB#0:
|
||||
; X64-NEXT: pextrw $7, %xmm0, %eax
|
||||
; X64-NEXT: pshufhw {{.*#+}} xmm1 = xmm0[0,1,2,3,4,5,6,5]
|
||||
; X64-NEXT: pinsrw $1, %eax, %xmm1
|
||||
; X64-NEXT: pextrw $1, %xmm0, %eax
|
||||
; X64-NEXT: pinsrw $4, %eax, %xmm1
|
||||
; X64-NEXT: movdqa %xmm1, %xmm0
|
||||
; X64-NEXT: retq
|
||||
%tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 7, i32 2, i32 3, i32 1, i32 5, i32 6, i32 5 >
|
||||
ret <8 x i16> %tmp
|
||||
; X64-LABEL: t4:
|
||||
; X64: pextrw $7, [[XMM0:%xmm[0-9]+]], %eax
|
||||
; X64: pshufhw $100, [[XMM0]], [[XMM1:%xmm[0-9]+]]
|
||||
; X64: pinsrw $1, %eax, [[XMM1]]
|
||||
; X64: pextrw $1, [[XMM0]], %eax
|
||||
; X64: pinsrw $4, %eax, %xmm{{[0-9]}}
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
define <8 x i16> @t5(<8 x i16> %A, <8 x i16> %B) nounwind {
|
||||
; X64-LABEL: t5:
|
||||
; X64: ## BB#0:
|
||||
; X64-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
||||
; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,0,3,1]
|
||||
; X64-NEXT: retq
|
||||
%tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 0, i32 1, i32 10, i32 11, i32 2, i32 3 >
|
||||
ret <8 x i16> %tmp
|
||||
; X64: t5:
|
||||
; X64: movlhps %xmm1, %xmm0
|
||||
; X64: pshufd $114, %xmm0, %xmm0
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
define <8 x i16> @t6(<8 x i16> %A, <8 x i16> %B) nounwind {
|
||||
; X64-LABEL: t6:
|
||||
; X64: ## BB#0:
|
||||
; X64-NEXT: movss %xmm1, %xmm0
|
||||
; X64-NEXT: retq
|
||||
%tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 8, i32 9, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
|
||||
ret <8 x i16> %tmp
|
||||
; X64: t6:
|
||||
; X64: movss %xmm1, %xmm0
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
define <8 x i16> @t7(<8 x i16> %A, <8 x i16> %B) nounwind {
|
||||
; X64-LABEL: t7:
|
||||
; X64: ## BB#0:
|
||||
; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,3,2,4,5,6,7]
|
||||
; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,4,7]
|
||||
; X64-NEXT: retq
|
||||
%tmp = shufflevector <8 x i16> %A, <8 x i16> %B, <8 x i32> < i32 0, i32 0, i32 3, i32 2, i32 4, i32 6, i32 4, i32 7 >
|
||||
ret <8 x i16> %tmp
|
||||
; X64: t7:
|
||||
; X64: pshuflw $-80, %xmm0, %xmm0
|
||||
; X64: pshufhw $-56, %xmm0, %xmm0
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
define void @t8(<2 x i64>* %res, <2 x i64>* %A) nounwind {
|
||||
; X64-LABEL: t8:
|
||||
; X64: ## BB#0:
|
||||
; X64-NEXT: pshuflw {{.*#+}} xmm0 = mem[2,1,0,3,4,5,6,7]
|
||||
; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,6,5,4,7]
|
||||
; X64-NEXT: movdqa %xmm0, (%rdi)
|
||||
; X64-NEXT: retq
|
||||
%tmp = load <2 x i64>* %A
|
||||
%tmp.upgrd.1 = bitcast <2 x i64> %tmp to <8 x i16>
|
||||
%tmp0 = extractelement <8 x i16> %tmp.upgrd.1, i32 0
|
||||
@ -115,14 +129,15 @@ define void @t8(<2 x i64>* %res, <2 x i64>* %A) nounwind {
|
||||
%tmp15.upgrd.2 = bitcast <8 x i16> %tmp15 to <2 x i64>
|
||||
store <2 x i64> %tmp15.upgrd.2, <2 x i64>* %res
|
||||
ret void
|
||||
; X64: t8:
|
||||
; X64: pshuflw $-58, (%rsi), %xmm0
|
||||
; X64: pshufhw $-58, %xmm0, %xmm0
|
||||
; X64: movdqa %xmm0, (%rdi)
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
define void @t9(<4 x float>* %r, <2 x i32>* %A) nounwind {
|
||||
; X64-LABEL: t9:
|
||||
; X64: ## BB#0:
|
||||
; X64-NEXT: movaps (%rdi), %xmm0
|
||||
; X64-NEXT: movhps (%rsi), %xmm0
|
||||
; X64-NEXT: movaps %xmm0, (%rdi)
|
||||
; X64-NEXT: retq
|
||||
%tmp = load <4 x float>* %r
|
||||
%tmp.upgrd.3 = bitcast <2 x i32>* %A to double*
|
||||
%tmp.upgrd.4 = load double* %tmp.upgrd.3
|
||||
@ -139,11 +154,6 @@ define void @t9(<4 x float>* %r, <2 x i32>* %A) nounwind {
|
||||
%tmp13 = insertelement <4 x float> %tmp12, float %tmp9, i32 3
|
||||
store <4 x float> %tmp13, <4 x float>* %r
|
||||
ret void
|
||||
; X64: t9:
|
||||
; X64: movaps (%rdi), %xmm0
|
||||
; X64: movhps (%rsi), %xmm0
|
||||
; X64: movaps %xmm0, (%rdi)
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
|
||||
@ -154,113 +164,123 @@ define void @t9(<4 x float>* %r, <2 x i32>* %A) nounwind {
|
||||
@g1 = external constant <4 x i32>
|
||||
@g2 = external constant <4 x i16>
|
||||
|
||||
define internal void @t10() nounwind {
|
||||
load <4 x i32>* @g1, align 16
|
||||
bitcast <4 x i32> %1 to <8 x i16>
|
||||
shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> < i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef >
|
||||
bitcast <8 x i16> %3 to <2 x i64>
|
||||
extractelement <2 x i64> %4, i32 0
|
||||
bitcast i64 %5 to <4 x i16>
|
||||
store <4 x i16> %6, <4 x i16>* @g2, align 8
|
||||
ret void
|
||||
; X64: t10:
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||||
; X64: pextrw $4, [[X0:%xmm[0-9]+]], %e{{..}}
|
||||
; X64: pextrw $6, [[X0]], %e{{..}}
|
||||
; X64: movlhps [[X0]], [[X0]]
|
||||
; X64: pshuflw $8, [[X0]], [[X0]]
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||||
; X64: pinsrw $2, %e{{..}}, [[X0]]
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||||
; X64: pinsrw $3, %e{{..}}, [[X0]]
|
||||
define void @t10() nounwind {
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||||
; X64-LABEL: t10:
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||||
; X64: ## BB#0:
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||||
; X64-NEXT: movq _g1@{{.*}}(%rip), %rax
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||||
; X64-NEXT: movdqa (%rax), %xmm0
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||||
; X64-NEXT: pextrw $4, %xmm0, %eax
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||||
; X64-NEXT: pextrw $6, %xmm0, %ecx
|
||||
; X64-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
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||||
; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,0,0,4,5,6,7]
|
||||
; X64-NEXT: pinsrw $2, %eax, %xmm0
|
||||
; X64-NEXT: pinsrw $3, %ecx, %xmm0
|
||||
; X64-NEXT: movq _g2@{{.*}}(%rip), %rax
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||||
; X64-NEXT: movq %xmm0, (%rax)
|
||||
; X64-NEXT: retq
|
||||
load <4 x i32>* @g1, align 16
|
||||
bitcast <4 x i32> %1 to <8 x i16>
|
||||
shufflevector <8 x i16> %2, <8 x i16> undef, <8 x i32> < i32 0, i32 2, i32 4, i32 6, i32 undef, i32 undef, i32 undef, i32 undef >
|
||||
bitcast <8 x i16> %3 to <2 x i64>
|
||||
extractelement <2 x i64> %4, i32 0
|
||||
bitcast i64 %5 to <4 x i16>
|
||||
store <4 x i16> %6, <4 x i16>* @g2, align 8
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
; Pack various elements via shuffles.
|
||||
define <8 x i16> @t11(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
|
||||
; X64-LABEL: t11:
|
||||
; X64: ## BB#0: ## %entry
|
||||
; X64-NEXT: movd %xmm1, %eax
|
||||
; X64-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
|
||||
; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,0,0,0,4,5,6,7]
|
||||
; X64-NEXT: pinsrw $1, %eax, %xmm0
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%tmp7 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 1, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
|
||||
ret <8 x i16> %tmp7
|
||||
|
||||
; X64-LABEL: t11:
|
||||
; X64: movd %xmm1, %eax
|
||||
; X64: movlhps %xmm0, %xmm0
|
||||
; X64: pshuflw $1, %xmm0, %xmm0
|
||||
; X64: pinsrw $1, %eax, %xmm0
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
|
||||
define <8 x i16> @t12(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
|
||||
; X64-LABEL: t12:
|
||||
; X64: ## BB#0: ## %entry
|
||||
; X64-NEXT: pextrw $3, %xmm1, %eax
|
||||
; X64-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
|
||||
; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,4,4,4]
|
||||
; X64-NEXT: pinsrw $5, %eax, %xmm0
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 0, i32 1, i32 undef, i32 undef, i32 3, i32 11, i32 undef , i32 undef >
|
||||
ret <8 x i16> %tmp9
|
||||
|
||||
; X64-LABEL: t12:
|
||||
; X64: pextrw $3, %xmm1, %eax
|
||||
; X64: movlhps %xmm0, %xmm0
|
||||
; X64: pshufhw $3, %xmm0, %xmm0
|
||||
; X64: pinsrw $5, %eax, %xmm0
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
|
||||
define <8 x i16> @t13(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
|
||||
; X64-LABEL: t13:
|
||||
; X64: ## BB#0: ## %entry
|
||||
; X64-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
|
||||
; X64-NEXT: pextrw $3, %xmm1, %eax
|
||||
; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,7,4,4]
|
||||
; X64-NEXT: pinsrw $4, %eax, %xmm0
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 11, i32 3, i32 undef , i32 undef >
|
||||
ret <8 x i16> %tmp9
|
||||
; X64-LABEL: t13:
|
||||
; X64: punpcklqdq %xmm0, %xmm1
|
||||
; X64: pextrw $3, %xmm1, %eax
|
||||
; X64: pshufhw $12, %xmm1, %xmm0
|
||||
; X64: pinsrw $4, %eax, %xmm0
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
|
||||
define <8 x i16> @t14(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
|
||||
; X64-LABEL: t14:
|
||||
; X64: ## BB#0: ## %entry
|
||||
; X64-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0]
|
||||
; X64-NEXT: pshufhw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,6,4,4]
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%tmp9 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 2, i32 undef , i32 undef >
|
||||
ret <8 x i16> %tmp9
|
||||
; X64-LABEL: t14:
|
||||
; X64: punpcklqdq %xmm0, %xmm1
|
||||
; X64: pshufhw $8, %xmm1, %xmm0
|
||||
; X64: ret
|
||||
}
|
||||
|
||||
|
||||
; FIXME: t15 is worse off from disabling of scheduler 2-address hack.
|
||||
define <8 x i16> @t15(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
|
||||
; X64-LABEL: t15:
|
||||
; X64: ## BB#0: ## %entry
|
||||
; X64-NEXT: pextrw $7, %xmm0, %eax
|
||||
; X64-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
|
||||
; X64-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,2,4,5,6,7]
|
||||
; X64-NEXT: pinsrw $2, %eax, %xmm0
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%tmp8 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 undef, i32 undef, i32 7, i32 2, i32 8, i32 undef, i32 undef , i32 undef >
|
||||
ret <8 x i16> %tmp8
|
||||
; X64: t15:
|
||||
; X64: pextrw $7, %xmm0, %eax
|
||||
; X64: punpcklqdq %xmm1, %xmm0
|
||||
; X64: pshuflw $-128, %xmm0, %xmm0
|
||||
; X64: pinsrw $2, %eax, %xmm0
|
||||
; X64: ret
|
||||
%tmp8 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> < i32 undef, i32 undef, i32 7, i32 2, i32 8, i32 undef, i32 undef , i32 undef >
|
||||
ret <8 x i16> %tmp8
|
||||
}
|
||||
|
||||
|
||||
; Test yonah where we convert a shuffle to pextrw and pinrsw
|
||||
define <16 x i8> @t16(<16 x i8> %T0) nounwind readnone {
|
||||
; X64-LABEL: t16:
|
||||
; X64: ## BB#0: ## %entry
|
||||
; X64-NEXT: pextrw $8, %xmm0, %eax
|
||||
; X64-NEXT: pslldq $2, %xmm0
|
||||
; X64-NEXT: andl $65280, %eax ## imm = 0xFF00
|
||||
; X64-NEXT: pextrw $1, %xmm0, %ecx
|
||||
; X64-NEXT: movzbl %cl, %ecx
|
||||
; X64-NEXT: orl %eax, %ecx
|
||||
; X64-NEXT: pinsrw $1, %ecx, %xmm0
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%tmp8 = shufflevector <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 1, i8 1, i8 1, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 16, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
|
||||
%tmp9 = shufflevector <16 x i8> %tmp8, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 2, i32 17, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
|
||||
ret <16 x i8> %tmp9
|
||||
; X64: t16:
|
||||
; X64: pextrw $8, %xmm0, %eax
|
||||
; X64: pslldq $2, %xmm0
|
||||
; X64: pextrw $1, %xmm0, %ecx
|
||||
; X64: movzbl %cl, %ecx
|
||||
; X64: orl %eax, %ecx
|
||||
; X64: pinsrw $1, %ecx, %xmm0
|
||||
; X64: ret
|
||||
%tmp8 = shufflevector <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 1, i8 1, i8 1, i8 1, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 16, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
|
||||
%tmp9 = shufflevector <16 x i8> %tmp8, <16 x i8> %T0, <16 x i32> < i32 0, i32 1, i32 2, i32 17, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef , i32 undef >
|
||||
ret <16 x i8> %tmp9
|
||||
}
|
||||
|
||||
; rdar://8520311
|
||||
define <4 x i32> @t17() nounwind {
|
||||
entry:
|
||||
; X64-LABEL: t17:
|
||||
; X64: movddup (%rax), %xmm0
|
||||
; X64: ## BB#0: ## %entry
|
||||
; X64-NEXT: movddup (%rax), %xmm0
|
||||
; X64-NEXT: andpd {{.*}}(%rip), %xmm0
|
||||
; X64-NEXT: retq
|
||||
entry:
|
||||
%tmp1 = load <4 x float>* undef, align 16
|
||||
%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
|
||||
%tmp3 = load <4 x float>* undef, align 16
|
||||
|
||||
File diff suppressed because it is too large
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Reference in New Issue
Block a user