From 2cf8dd384e69593475e4e5e6cf98b5b15c778ab8 Mon Sep 17 00:00:00 2001
From: Jim Grosbach <grosbach@apple.com>
Date: Tue, 11 Oct 2011 20:17:35 +0000
Subject: [PATCH] ARM addressing mode cleanup for LDC/STC.

We parse at least some forms of the instructions now. Encoding is
pretty screwed up, still, though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141704 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMInstrInfo.td | 36 +++++++++++++++++++---------------
 1 file changed, 20 insertions(+), 16 deletions(-)

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 82f972b5f26..a89a5898eba 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -4253,8 +4253,8 @@ class ACI<dag oops, dag iops, string opc, string asm,
 
 multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
   def _OFFSET : ACI<(outs),
-      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
-      !strconcat(opc, cond), "\tp$cop, cr$CRd, $addr"> {
+      !con((ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr), ops),
+      !strconcat(opc, cond), "\t$cop, $CRd, $addr"> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 1; // P = 1
     let Inst{21} = 0; // W = 0
@@ -4264,8 +4264,8 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
   }
 
   def _PRE : ACI<(outs),
-      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
-      !strconcat(opc, cond), "\tp$cop, cr$CRd, $addr!", IndexModePre> {
+      !con((ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr), ops),
+      !strconcat(opc, cond), "\t$cop, $CRd, $addr!", IndexModePre> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 1; // P = 1
     let Inst{21} = 1; // W = 1
@@ -4275,8 +4275,10 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
   }
 
   def _POST : ACI<(outs),
-      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
-      !strconcat(opc, cond), "\tp$cop, cr$CRd, $addr", IndexModePost> {
+      !con((ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
+            postidx_imm8s4:$offset), ops),
+      !strconcat(opc, cond), "\t$cop, $CRd, $addr, $offset",
+      IndexModePost> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 0; // P = 0
     let Inst{21} = 1; // W = 1
@@ -4286,9 +4288,10 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
   }
 
   def _OPTION : ACI<(outs),
-      !con((ins nohash_imm:$cop,nohash_imm:$CRd,GPR:$base, nohash_imm:$option),
+      !con((ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$base,
+                nohash_imm:$option),
             ops),
-      !strconcat(opc, cond), "\tp$cop, cr$CRd, [$base], \\{$option\\}"> {
+      !strconcat(opc, cond), "\t$cop, $CRd, $base, \\{$option\\}"> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 0; // P = 0
     let Inst{23} = 1; // U = 1
@@ -4299,8 +4302,8 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
   }
 
   def L_OFFSET : ACI<(outs),
-      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
-      !strconcat(!strconcat(opc, "l"), cond), "\tp$cop, cr$CRd, $addr"> {
+      !con((ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr), ops),
+      !strconcat(!strconcat(opc, "l"), cond), "\t$cop, $CRd, $addr"> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 1; // P = 1
     let Inst{21} = 0; // W = 0
@@ -4310,8 +4313,8 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
   }
 
   def L_PRE : ACI<(outs),
-      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
-      !strconcat(!strconcat(opc, "l"), cond), "\tp$cop, cr$CRd, $addr!",
+      !con((ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr), ops),
+      !strconcat(!strconcat(opc, "l"), cond), "\t$cop, $CRd, $addr!",
       IndexModePre> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 1; // P = 1
@@ -4322,9 +4325,9 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
   }
 
   def L_POST : ACI<(outs),
-      !con((ins nohash_imm:$cop, nohash_imm:$CRd, addr_offset_none:$addr,
+      !con((ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
             postidx_imm8s4:$offset), ops),
-      !strconcat(!strconcat(opc, "l"), cond), "\tp$cop, cr$CRd, $addr, $offset",
+      !strconcat(!strconcat(opc, "l"), cond), "\t$cop, $CRd, $addr, $offset",
       IndexModePost> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 0; // P = 0
@@ -4335,10 +4338,11 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
   }
 
   def L_OPTION : ACI<(outs),
-      !con((ins nohash_imm:$cop, nohash_imm:$CRd,GPR:$base,nohash_imm:$option),
+      !con((ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$base,
+                nohash_imm:$option),
             ops),
       !strconcat(!strconcat(opc, "l"), cond),
-      "\tp$cop, cr$CRd, [$base], \\{$option\\}"> {
+      "\t$cop, $CRd, $base, \\{$option\\}"> {
     let Inst{31-28} = op31_28;
     let Inst{24} = 0; // P = 0
     let Inst{23} = 1; // U = 1