mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-18 12:29:21 +00:00
Switch to AlphaISD::CALL instead of ISD::CALL
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25718 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
281b55ebec
commit
2d90bd5f42
@ -161,8 +161,7 @@ SDOperand AlphaDAGToDAGISel::Select(SDOperand Op) {
|
|||||||
|
|
||||||
switch (N->getOpcode()) {
|
switch (N->getOpcode()) {
|
||||||
default: break;
|
default: break;
|
||||||
case ISD::TAILCALL:
|
case AlphaISD::CALL: return SelectCALL(Op);
|
||||||
case ISD::CALL: return SelectCALL(Op);
|
|
||||||
|
|
||||||
case ISD::FrameIndex: {
|
case ISD::FrameIndex: {
|
||||||
int FI = cast<FrameIndexSDNode>(N)->getIndex();
|
int FI = cast<FrameIndexSDNode>(N)->getIndex();
|
||||||
|
@ -164,6 +164,7 @@ const char *AlphaTargetLowering::getTargetNodeName(unsigned Opcode) const {
|
|||||||
case AlphaISD::GPRelLo: return "Alpha::GPRelLo";
|
case AlphaISD::GPRelLo: return "Alpha::GPRelLo";
|
||||||
case AlphaISD::RelLit: return "Alpha::RelLit";
|
case AlphaISD::RelLit: return "Alpha::RelLit";
|
||||||
case AlphaISD::GlobalBaseReg: return "Alpha::GlobalBaseReg";
|
case AlphaISD::GlobalBaseReg: return "Alpha::GlobalBaseReg";
|
||||||
|
case AlphaISD::CALL: return "Alpha::CALL";
|
||||||
case AlphaISD::DivCall: return "Alpha::DivCall";
|
case AlphaISD::DivCall: return "Alpha::DivCall";
|
||||||
case AlphaISD::LDQ_: return "Alpha::LDQ_";
|
case AlphaISD::LDQ_: return "Alpha::LDQ_";
|
||||||
case AlphaISD::LDT_: return "Alpha::LDT_";
|
case AlphaISD::LDT_: return "Alpha::LDT_";
|
||||||
@ -357,8 +358,11 @@ AlphaTargetLowering::LowerCallTo(SDOperand Chain,
|
|||||||
RetVals.push_back(ActualRetTyVT);
|
RetVals.push_back(ActualRetTyVT);
|
||||||
RetVals.push_back(MVT::Other);
|
RetVals.push_back(MVT::Other);
|
||||||
|
|
||||||
SDOperand TheCall = SDOperand(DAG.getCall(RetVals,
|
std::vector<SDOperand> Ops;
|
||||||
Chain, Callee, args_to_use), 0);
|
Ops.push_back(Chain);
|
||||||
|
Ops.push_back(Callee);
|
||||||
|
Ops.insert(Ops.end(), args_to_use.begin(), args_to_use.end());
|
||||||
|
SDOperand TheCall = DAG.getNode(AlphaISD::CALL, RetVals, Ops);
|
||||||
Chain = TheCall.getValue(RetTyVT != MVT::isVoid);
|
Chain = TheCall.getValue(RetTyVT != MVT::isVoid);
|
||||||
Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain,
|
Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain,
|
||||||
DAG.getConstant(NumBytes, getPointerTy()));
|
DAG.getConstant(NumBytes, getPointerTy()));
|
||||||
|
@ -37,6 +37,9 @@ namespace llvm {
|
|||||||
|
|
||||||
/// GlobalBaseReg - used to restore the GOT ptr
|
/// GlobalBaseReg - used to restore the GOT ptr
|
||||||
GlobalBaseReg,
|
GlobalBaseReg,
|
||||||
|
|
||||||
|
/// CALL - Normal call.
|
||||||
|
CALL,
|
||||||
|
|
||||||
/// DIVCALL - used for special library calls for div and rem
|
/// DIVCALL - used for special library calls for div and rem
|
||||||
DivCall,
|
DivCall,
|
||||||
|
Loading…
Reference in New Issue
Block a user